diff --git a/patch.sh b/patch.sh index 608dc56b..22e9846d 100755 --- a/patch.sh +++ b/patch.sh @@ -24,7 +24,7 @@ EXTERNAL_TREE="git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable EXTERNAL_BRANCH="linux-3.8.y" EXTERNAL_SHA="dbf932a9b316d5b29b3e220e5a30e7a165ad2992" -PATCHSET="dma rtc pinctrl cpufreq adc i2c da8xx-fb pwm mmc crypto 6lowpan capebus arm omap omap_sakoman omap_beagle_expansion omap_beagle omap_panda net drm not-capebus pru usb PG2 reboot iio w1 gpmc mxt ssd130x build hdmi resetctrl camera resources pmic" +PATCHSET="dma rtc pinctrl cpufreq adc i2c da8xx-fb pwm mmc crypto 6lowpan capebus arm omap omap_sakoman omap_beagle_expansion omap_beagle omap_panda net drm not-capebus pru usb PG2 reboot iio w1 gpmc mxt ssd130x build hdmi resetctrl camera resources pmic spi" git_kernel_stable () { git pull git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git master --tags || true diff --git a/patches/spi/001-spi0_spidev-virtual-cape-dts.patch b/patches/spi/001-spi0_spidev-virtual-cape-dts.patch new file mode 100644 index 00000000..ff7c7b1a --- /dev/null +++ b/patches/spi/001-spi0_spidev-virtual-cape-dts.patch @@ -0,0 +1,172 @@ +From f14e8865327109fb79245dd56c782a6e6d50ab77 Mon Jun 10 00:00:00 2013 +From: Ian McMahon +Date: Mon, 10 Jun 2013 12:04:41 -0400 +Subject: added SPIDEV virtual capes + + +diff --git a/firmware/capes/BB-SPI0_SPIDEV-00A0.dts b/firmware/capes/BB-SPI0_SPIDEV-00A0.dts +new file mode 100644 +index 0000000..af0875b +--- /dev/null ++++ b/firmware/capes/BB-SPI0_SPIDEV-00A0.dts +@@ -0,0 +1,68 @@ ++/* ++ * Copyright (C) 2013 Ian McMahon ++ * ++ * Virtual cape enabling SPIDEV on SPI0 on connector pins P9.22 P9.21 P9.18 P9.17 ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "ti,beaglebone", "ti,beaglebone-black"; ++ ++ /* identification */ ++ part-number = "BB-SPI0_SPIDEV"; ++ version = "00A0"; ++ ++ /* state the resources this cape uses */ ++ exclusive-use = ++ /* the pin header uses */ ++ "P9.17", /* spi0_cs0 */ ++ "P9.18", /* spi0_d1 */ ++ "P9.21", /* spi0_d0 */ ++ "P9.22", /* spi0_sclk */ ++ /* the hardware ip uses */ ++ "spi0"; ++ ++ fragment@0 { ++ target = <&am33xx_pinmux>; ++ __overlay__ { ++ /* default state has all gpios released and mode set to uart1 */ ++ bb_spi0_pins: pinmux_bb_spi0_pins { ++ pinctrl-single,pins = < ++ 0x150 0x30 /* spi0_sclk.spi0_sclk, INPUT_PULLUP | MODE0 */ ++ 0x154 0x30 /* spi0_d0.spi0_d0, INPUT_PULLUP | MODE0 */ ++ 0x158 0x10 /* spi0_d1.spi0_d1, OUTPUT_PULLUP | MODE0 */ ++ 0x15c 0x10 /* spi0_cs0.spi0_cs0, OUTPUT_PULLUP | MODE0 */ ++ >; ++ }; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&spi0>; /* spi0 is numbered correctly */ ++ __overlay__ { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&bb_spi0_pins>; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ spi0_0 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ compatible = "linux,spidev"; ++ reg = <0>; /* CS value for this device (BB has only CS0 broken out for SPI0, so only one device is possible) */ ++ spi-max-frequency = <16000000>; ++ ++ // set cpol and cpha as necessary. Default is neither, which is mode 0. ++ // spi-cpol; ++ // spi-cpha; ++ }; ++ }; ++ }; ++}; +diff --git a/firmware/capes/BB-SPI1_SPIDEV-00A0.dts b/firmware/capes/BB-SPI1_SPIDEV-00A0.dts +new file mode 100644 +index 0000000..f961eea +--- /dev/null ++++ b/firmware/capes/BB-SPI1_SPIDEV-00A0.dts +@@ -0,0 +1,86 @@ ++/* ++ * Copyright (C) 2013 Ian McMahon ++ * ++ * Virtual cape for SPI1 on connector pins P9.29 P9.31 P9.30 P9.28 ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "ti,beaglebone", "ti,beaglebone-black"; ++ ++ /* identification */ ++ part-number = "BB-SPI1"; ++ version = "00A0"; ++ ++ /* state the resources this cape uses */ ++ exclusive-use = ++ /* the pin header uses */ ++ "P9.31", /* spi1_sclk */ ++ "P9.29", /* spi1_d0 */ ++ "P9.30", /* spi1_d1 */ ++ "P9.28", /* spi1_cs0 */ ++ // "P9.42", /* spi1_cs1 */ ++ /* the hardware ip uses */ ++ "spi1"; ++ ++ fragment@0 { ++ target = <&am33xx_pinmux>; ++ __overlay__ { ++ /* default state has all gpios released and mode set to uart1 */ ++ bb_spi1_pins: pinmux_bb_spi1_pins { ++ pinctrl-single,pins = < ++ 0x190 0x33 /* mcasp0_aclkx.spi1_sclk, INPUT_PULLUP | MODE3 */ ++ 0x194 0x33 /* mcasp0_fsx.spi1_d0, INPUT_PULLUP | MODE3 */ ++ 0x198 0x13 /* mcasp0_axr0.spi1_d1, OUTPUT_PULLUP | MODE3 */ ++ 0x19c 0x13 /* mcasp0_ahclkr.spi1_cs0, OUTPUT_PULLUP | MODE3 */ ++ // 0x164 0x12 /* eCAP0_in_PWM0_out.spi1_cs1 OUTPUT_PULLUP | MODE2 */ ++ >; ++ }; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&spi1>; /* spi1 is numbered correctly */ ++ __overlay__ { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&bb_spi1_pins>; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ spi1_0 { ++ // this is the CS0 device ++ #address-cells = <1>; ++ #size-cells = <0>; ++ compatible = "linux,spidev"; ++ reg = <0>; // reg 0 is CS0 ++ spi-max-frequency = <16000000>; ++ ++ // set cpol and cpha as necessary. Default is neither, which is mode 0. ++ // spi-cpol; ++ // spi-cpha; ++ }; ++ ++ /* uncomment the cs1 pinmuxing and exclusive-use lines above if enabling spi1_1 ++ spi1_1 { ++ // this is the CS1 device ++ #address-cells = <1>; ++ #size-cells = <0>; ++ compatible = "linux,spidev"; ++ reg = <1>; // reg 1 is CS1 ++ spi-max-frequency = <16000000>; ++ ++ // set cpol and cpha as necessary. Default is neither, which is mode 0. ++ // spi-cpol; ++ // spi-cpha; ++ }; ++ */ ++ }; ++ }; ++};