Skip to content

Run linter in CI #47

@hasheddan

Description

@hasheddan

Currently there are no linting rules applied to Verilog RTL files. We should standardize on a tool and ruleset, then block merging PRs if linter fails.

Metadata

Metadata

Assignees

Labels

No labels
No labels

Type

No type

Projects

No projects

Milestone

No milestone

Relationships

None yet

Development

No branches or pull requests

Issue actions