From 884c7b9bc48c0dff03a0f8dc3684965dae57521e Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Fri, 21 Nov 2025 16:18:24 +0100 Subject: [PATCH 1/5] system(wb0) update STM32WB0x HAL Drivers to v1.4.0 Included in STM32CubeWB0 FW v1.4.0 Signed-off-by: Frederic Pillon --- .../Inc/Legacy/stm32_hal_legacy.h | 21 +- .../STM32WB0x_HAL_Driver/Inc/stm32wb0x_hal.h | 2 +- .../Inc/stm32wb0x_hal_adc.h | 12 +- .../Inc/stm32wb0x_hal_radio.h | 18 + .../Inc/stm32wb0x_hal_radio_timer.h | 2 +- .../Inc/stm32wb0x_ll_adc.h | 10 +- .../Inc/stm32wb0x_ll_dma.h | 40 --- .../Inc/stm32wb0x_ll_radio_timer.h | 3 - .../STM32WB0x_HAL_Driver/Release_Notes.html | 312 +++++++++--------- .../Src/stm32wb0x_hal_flash_ex.c | 2 +- .../Src/stm32wb0x_hal_radio.c | 41 ++- .../Src/stm32wb0x_hal_radio_timer.c | 267 +++++++-------- .../Src/stm32wb0x_hal_timebase_tim_template.c | 5 + .../Src/stm32wb0x_hal_uart.c | 66 +--- .../Src/stm32wb0x_ll_adc.c | 2 +- .../Drivers/STM32YYxx_HAL_Driver_version.md | 2 +- 16 files changed, 381 insertions(+), 424 deletions(-) diff --git a/system/Drivers/STM32WB0x_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h b/system/Drivers/STM32WB0x_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h index cc77833a0f..836d610016 100644 --- a/system/Drivers/STM32WB0x_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h +++ b/system/Drivers/STM32WB0x_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h @@ -361,7 +361,10 @@ extern "C" { #if defined(STM32L4R5xx) || defined(STM32L4R9xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || \ defined(STM32L4S7xx) || defined(STM32L4S9xx) #define DMA_REQUEST_DCMI_PSSI DMA_REQUEST_DCMI -#endif +#elif defined(STM32L4P5xx) || defined(STM32L4Q5xx) +#define DMA_REQUEST_PSSI DMA_REQUEST_DCMI_PSSI +#define LL_DMAMUX_REQ_PSSI LL_DMAMUX_REQ_DCMI_PSSI +#endif /* STM32L4R5xx || STM32L4R9xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ #endif /* STM32L4 */ @@ -2149,6 +2152,13 @@ extern "C" { #define UFB_MODE_BitNumber UFB_MODE_BIT_NUMBER #define CMP_PD_BitNumber CMP_PD_BIT_NUMBER +#if defined(STM32H7RS) || defined(STM32N6) +#define FMC_SWAPBMAP_DISABLE FMC_SWAPBANK_MODE0 +#define FMC_SWAPBMAP_SDRAM_SRAM FMC_SWAPBANK_MODE1 +#define HAL_SetFMCMemorySwappingConfig HAL_FMC_SetBankSwapConfig +#define HAL_GetFMCMemorySwappingConfig HAL_FMC_GetBankSwapConfig +#endif /* STM32H7RS || STM32N6 */ + /** * @} */ @@ -3701,9 +3711,7 @@ extern "C" { #define RCC_SYSCLKSOURCE_STATUS_PLLR RCC_SYSCLKSOURCE_STATUS_PLLCLK #endif -#if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) || \ - defined(STM32WL) || defined(STM32C0) || defined(STM32N6) || defined(STM32H7RS) || \ - defined(STM32U0) +#if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) || defined(STM32WL) || defined(STM32C0) || defined(STM32N6) || defined(STM32H7RS) || defined(STM32U0) #define RCC_RTCCLKSOURCE_NO_CLK RCC_RTCCLKSOURCE_NONE #else #define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK @@ -3952,10 +3960,7 @@ extern "C" { /** @defgroup HAL_RTC_Aliased_Macros HAL RTC Aliased Macros maintained for legacy purpose * @{ */ -#if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || \ - defined (STM32L4P5xx)|| defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL) || defined (STM32U5) || \ - defined (STM32WBA) || defined (STM32H5) || \ - defined (STM32C0) || defined (STM32N6) || defined (STM32H7RS) || defined (STM32U0) || defined (STM32U3) +#if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || defined (STM32L4P5xx)|| defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL) || defined (STM32U5) || defined (STM32WBA) || defined (STM32H5) || defined (STM32C0) || defined (STM32N6) || defined (STM32H7RS) || defined (STM32U0) || defined (STM32U3) #else #define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG #endif diff --git a/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_hal.h b/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_hal.h index b6ac41a98c..cfa9ae8924 100644 --- a/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_hal.h +++ b/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_hal.h @@ -48,7 +48,7 @@ extern "C" { * @brief HAL Driver version number */ #define __STM32WB0x_HAL_VERSION_MAIN (0x01U) /*!< [31:24] main version */ -#define __STM32WB0x_HAL_VERSION_SUB1 (0x03U) /*!< [23:16] sub1 version */ +#define __STM32WB0x_HAL_VERSION_SUB1 (0x04U) /*!< [23:16] sub1 version */ #define __STM32WB0x_HAL_VERSION_SUB2 (0x00U) /*!< [15:8] sub2 version */ #define __STM32WB0x_HAL_VERSION_RC (0x00U) /*!< [7:0] release candidate */ #define __STM32WB0x_HAL_VERSION ((__STM32WB0x_HAL_VERSION_MAIN << 24U)\ diff --git a/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_hal_adc.h b/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_hal_adc.h index 920a97cb24..e73d2beb47 100644 --- a/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_hal_adc.h +++ b/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_hal_adc.h @@ -365,10 +365,14 @@ typedef void (*pADC_CallbackTypeDef)(ADC_HandleTypeDef *hadc); /*!< pointer to * @{ */ -#define ADC_SAMPLING_AT_START (LL_ADC_SAMPLING_AT_START) /*!< Sampling only at conversion start (default) */ -#define ADC_SAMPLING_AT_END (LL_ADC_SAMPLING_AT_END) /*!< Sampling sampling phase starts after end of - conversion, and stops upon trigger event - (Also known as Bulb sampling mode). */ +#define ADC_SAMPLING_AT_START (LL_ADC_SAMPLING_AT_START) /*!< Sampling phase starts only at conversion start and + sampling time is 125ns regardless of the sampling + period (default). */ +#define ADC_SAMPLING_AT_END (LL_ADC_SAMPLING_AT_END) /*!< Sampling phase starts after end of + conversion, and stops upon trigger event (Also known + as Bulb sampling mode). + Sampling time is a function of the sampling period + (Sample rate). */ /** * @} diff --git a/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_hal_radio.h b/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_hal_radio.h index c48a4353a0..e1bed9337e 100644 --- a/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_hal_radio.h +++ b/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_hal_radio.h @@ -96,6 +96,20 @@ typedef struct #endif /* USE_RADIO_PROPRIETARY_DRIVER */ +/** + * @} + */ + +/** @defgroup RADIO_TIMER_Exported_Constants Radio Timer Exported Constants + * @{ + */ + +#define RADIO_INITDELAY_WAKEUP (64U) +#define RADIO_INITDELAY_TIMER12_CAL (63U) +#define RADIO_INITDELAY_TIMER2_NOCAL (9U) + +#define RADIO_TXDELAY_START (16U) +#define RADIO_TXDELAY_END (24U) /** * @} */ @@ -109,10 +123,14 @@ void HAL_RADIO_Init(RADIO_HandleTypeDef *hradio); void HAL_RADIO_TXRX_IRQHandler(void); +void HAL_RADIO_RRM_IRQHandler(void); + void HAL_RADIO_TXRX_SEQ_IRQHandler(void); void HAL_RADIO_TxRxCallback(uint32_t flags); +void HAL_RADIO_RRMCallback(uint32_t ble_irq_status); + void HAL_RADIO_TxRxSeqCallback(void); int8_t HAL_RADIO_ReadRSSI(void); diff --git a/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_hal_radio_timer.h b/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_hal_radio_timer.h index 8d835a724b..40d83e6f21 100644 --- a/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_hal_radio_timer.h +++ b/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_hal_radio_timer.h @@ -173,7 +173,7 @@ RADIO_TIMER_Status HAL_RADIO_TIMER_GetRadioTimerStatus(uint64_t *time); * @param event_type: Specify if it is a TX (1) or RX (0) event. * @param cal_req: Specify if PLL calibration is requested (1) or not (0). * @retval 0 if radio activity has been scheduled successfully. - * @retval 1 if radio activity has been rejected (it is too close or in the past). + * @retval 1 if radio activity has been rejected. */ uint32_t HAL_RADIO_TIMER_SetRadioTimerValue(uint32_t time, uint8_t event_type, uint8_t cal_req); diff --git a/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_ll_adc.h b/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_ll_adc.h index e9caca78e8..58da97cd72 100644 --- a/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_ll_adc.h +++ b/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_ll_adc.h @@ -348,8 +348,14 @@ typedef struct * @{ */ -#define LL_ADC_SAMPLING_AT_START (0x00000000UL) /*!< Sampling only at conversion start */ -#define LL_ADC_SAMPLING_AT_END (ADC_CONF_ADC_CONT_1V2) /*!< Sampling starts at the end of conversion (default)*/ +#define LL_ADC_SAMPLING_AT_START (0x00000000UL) /*!< Sampling phase starts only at conversion start and + sampling time is 125ns regardless of the sampling + period (default). */ +#define LL_ADC_SAMPLING_AT_END (ADC_CONF_ADC_CONT_1V2) /*!< Sampling phase starts after end of + conversion, and stops upon trigger event (Also known + as Bulb sampling mode). + Sampling time is a function of the sampling period + (Sample rate). */ /** * @} diff --git a/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_ll_dma.h b/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_ll_dma.h index fff12f8c30..bc237ac451 100644 --- a/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_ll_dma.h +++ b/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_ll_dma.h @@ -430,7 +430,6 @@ typedef struct */ __STATIC_INLINE void LL_DMA_EnableChannel(DMA_TypeDef *DMAx, uint32_t Channel) { - (void)DMAx; SET_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_EN); } @@ -451,7 +450,6 @@ __STATIC_INLINE void LL_DMA_EnableChannel(DMA_TypeDef *DMAx, uint32_t Channel) */ __STATIC_INLINE void LL_DMA_DisableChannel(DMA_TypeDef *DMAx, uint32_t Channel) { - (void)DMAx; CLEAR_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_EN); } @@ -472,7 +470,6 @@ __STATIC_INLINE void LL_DMA_DisableChannel(DMA_TypeDef *DMAx, uint32_t Channel) */ __STATIC_INLINE uint32_t LL_DMA_IsEnabledChannel(DMA_TypeDef *DMAx, uint32_t Channel) { - (void)DMAx; return ((READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_EN) == (DMA_CCR_EN)) ? 1UL : 0UL); } @@ -509,7 +506,6 @@ __STATIC_INLINE uint32_t LL_DMA_IsEnabledChannel(DMA_TypeDef *DMAx, uint32_t Cha */ __STATIC_INLINE void LL_DMA_ConfigTransfer(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Configuration) { - (void)DMAx; MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_DIR | DMA_CCR_MEM2MEM | DMA_CCR_CIRC | DMA_CCR_PINC | DMA_CCR_MINC | DMA_CCR_PSIZE | DMA_CCR_MSIZE | DMA_CCR_PL, Configuration); @@ -537,7 +533,6 @@ __STATIC_INLINE void LL_DMA_ConfigTransfer(DMA_TypeDef *DMAx, uint32_t Channel, */ __STATIC_INLINE void LL_DMA_SetDataTransferDirection(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Direction) { - (void)DMAx; MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_DIR | DMA_CCR_MEM2MEM, Direction); } @@ -563,7 +558,6 @@ __STATIC_INLINE void LL_DMA_SetDataTransferDirection(DMA_TypeDef *DMAx, uint32_t */ __STATIC_INLINE uint32_t LL_DMA_GetDataTransferDirection(DMA_TypeDef *DMAx, uint32_t Channel) { - (void)DMAx; return (READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_DIR | DMA_CCR_MEM2MEM)); } @@ -590,7 +584,6 @@ __STATIC_INLINE uint32_t LL_DMA_GetDataTransferDirection(DMA_TypeDef *DMAx, uint */ __STATIC_INLINE void LL_DMA_SetMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Mode) { - (void)DMAx; MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_CIRC, Mode); } @@ -614,7 +607,6 @@ __STATIC_INLINE void LL_DMA_SetMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_ */ __STATIC_INLINE uint32_t LL_DMA_GetMode(DMA_TypeDef *DMAx, uint32_t Channel) { - (void)DMAx; return (READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_CIRC)); } @@ -639,7 +631,6 @@ __STATIC_INLINE uint32_t LL_DMA_GetMode(DMA_TypeDef *DMAx, uint32_t Channel) */ __STATIC_INLINE void LL_DMA_SetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphOrM2MSrcIncMode) { - (void)DMAx; MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_PINC, PeriphOrM2MSrcIncMode); } @@ -663,7 +654,6 @@ __STATIC_INLINE void LL_DMA_SetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Channel */ __STATIC_INLINE uint32_t LL_DMA_GetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Channel) { - (void)DMAx; return (READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_PINC)); } @@ -688,7 +678,6 @@ __STATIC_INLINE uint32_t LL_DMA_GetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Cha */ __STATIC_INLINE void LL_DMA_SetMemoryIncMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryOrM2MDstIncMode) { - (void)DMAx; MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_MINC, MemoryOrM2MDstIncMode); } @@ -712,7 +701,6 @@ __STATIC_INLINE void LL_DMA_SetMemoryIncMode(DMA_TypeDef *DMAx, uint32_t Channel */ __STATIC_INLINE uint32_t LL_DMA_GetMemoryIncMode(DMA_TypeDef *DMAx, uint32_t Channel) { - (void)DMAx; return (READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_MINC)); } @@ -738,7 +726,6 @@ __STATIC_INLINE uint32_t LL_DMA_GetMemoryIncMode(DMA_TypeDef *DMAx, uint32_t Cha */ __STATIC_INLINE void LL_DMA_SetPeriphSize(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphOrM2MSrcDataSize) { - (void)DMAx; MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_PSIZE, PeriphOrM2MSrcDataSize); } @@ -763,7 +750,6 @@ __STATIC_INLINE void LL_DMA_SetPeriphSize(DMA_TypeDef *DMAx, uint32_t Channel, u */ __STATIC_INLINE uint32_t LL_DMA_GetPeriphSize(DMA_TypeDef *DMAx, uint32_t Channel) { - (void)DMAx; return (READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_PSIZE)); } @@ -789,7 +775,6 @@ __STATIC_INLINE uint32_t LL_DMA_GetPeriphSize(DMA_TypeDef *DMAx, uint32_t Channe */ __STATIC_INLINE void LL_DMA_SetMemorySize(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryOrM2MDstDataSize) { - (void)DMAx; MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_MSIZE, MemoryOrM2MDstDataSize); } @@ -814,7 +799,6 @@ __STATIC_INLINE void LL_DMA_SetMemorySize(DMA_TypeDef *DMAx, uint32_t Channel, u */ __STATIC_INLINE uint32_t LL_DMA_GetMemorySize(DMA_TypeDef *DMAx, uint32_t Channel) { - (void)DMAx; return (READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_MSIZE)); } @@ -841,7 +825,6 @@ __STATIC_INLINE uint32_t LL_DMA_GetMemorySize(DMA_TypeDef *DMAx, uint32_t Channe */ __STATIC_INLINE void LL_DMA_SetChannelPriorityLevel(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Priority) { - (void)DMAx; MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_PL, Priority); } @@ -867,7 +850,6 @@ __STATIC_INLINE void LL_DMA_SetChannelPriorityLevel(DMA_TypeDef *DMAx, uint32_t */ __STATIC_INLINE uint32_t LL_DMA_GetChannelPriorityLevel(DMA_TypeDef *DMAx, uint32_t Channel) { - (void)DMAx; return (READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_PL)); } @@ -892,7 +874,6 @@ __STATIC_INLINE uint32_t LL_DMA_GetChannelPriorityLevel(DMA_TypeDef *DMAx, uint3 */ __STATIC_INLINE void LL_DMA_SetDataLength(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t NbData) { - (void)DMAx; MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CNDTR, DMA_CNDTR_NDT, NbData); } @@ -916,7 +897,6 @@ __STATIC_INLINE void LL_DMA_SetDataLength(DMA_TypeDef *DMAx, uint32_t Channel, u */ __STATIC_INLINE uint32_t LL_DMA_GetDataLength(DMA_TypeDef *DMAx, uint32_t Channel) { - (void)DMAx; return (READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CNDTR, DMA_CNDTR_NDT)); } @@ -948,7 +928,6 @@ __STATIC_INLINE uint32_t LL_DMA_GetDataLength(DMA_TypeDef *DMAx, uint32_t Channe __STATIC_INLINE void LL_DMA_ConfigAddresses(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t SrcAddress, uint32_t DstAddress, uint32_t Direction) { - (void)DMAx; /* Direction Memory to Periph */ if (Direction == LL_DMA_DIRECTION_MEMORY_TO_PERIPH) { @@ -983,7 +962,6 @@ __STATIC_INLINE void LL_DMA_ConfigAddresses(DMA_TypeDef *DMAx, uint32_t Channel, */ __STATIC_INLINE void LL_DMA_SetMemoryAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAddress) { - (void)DMAx; WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR, MemoryAddress); } @@ -1007,7 +985,6 @@ __STATIC_INLINE void LL_DMA_SetMemoryAddress(DMA_TypeDef *DMAx, uint32_t Channel */ __STATIC_INLINE void LL_DMA_SetPeriphAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphAddress) { - (void)DMAx; WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CPAR, PeriphAddress); } @@ -1029,7 +1006,6 @@ __STATIC_INLINE void LL_DMA_SetPeriphAddress(DMA_TypeDef *DMAx, uint32_t Channel */ __STATIC_INLINE uint32_t LL_DMA_GetMemoryAddress(DMA_TypeDef *DMAx, uint32_t Channel) { - (void)DMAx; return (READ_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR)); } @@ -1051,7 +1027,6 @@ __STATIC_INLINE uint32_t LL_DMA_GetMemoryAddress(DMA_TypeDef *DMAx, uint32_t Cha */ __STATIC_INLINE uint32_t LL_DMA_GetPeriphAddress(DMA_TypeDef *DMAx, uint32_t Channel) { - (void)DMAx; return (READ_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CPAR)); } @@ -1075,7 +1050,6 @@ __STATIC_INLINE uint32_t LL_DMA_GetPeriphAddress(DMA_TypeDef *DMAx, uint32_t Cha */ __STATIC_INLINE void LL_DMA_SetM2MSrcAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAddress) { - (void)DMAx; WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CPAR, MemoryAddress); } @@ -1099,7 +1073,6 @@ __STATIC_INLINE void LL_DMA_SetM2MSrcAddress(DMA_TypeDef *DMAx, uint32_t Channel */ __STATIC_INLINE void LL_DMA_SetM2MDstAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAddress) { - (void)DMAx; WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR, MemoryAddress); } @@ -1121,7 +1094,6 @@ __STATIC_INLINE void LL_DMA_SetM2MDstAddress(DMA_TypeDef *DMAx, uint32_t Channel */ __STATIC_INLINE uint32_t LL_DMA_GetM2MSrcAddress(DMA_TypeDef *DMAx, uint32_t Channel) { - (void)DMAx; return (READ_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CPAR)); } @@ -1143,7 +1115,6 @@ __STATIC_INLINE uint32_t LL_DMA_GetM2MSrcAddress(DMA_TypeDef *DMAx, uint32_t Cha */ __STATIC_INLINE uint32_t LL_DMA_GetM2MDstAddress(DMA_TypeDef *DMAx, uint32_t Channel) { - (void)DMAx; return (READ_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR)); } @@ -1166,7 +1137,6 @@ __STATIC_INLINE uint32_t LL_DMA_GetM2MDstAddress(DMA_TypeDef *DMAx, uint32_t Cha */ __STATIC_INLINE void LL_DMA_SetPeriphRequest(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Request) { - (void)DMAx; MODIFY_REG(__LL_DMA_INSTANCE_TO_DMAMUX_CCR(DMAx, Channel - 1U)->CxCR, DMAMUX_CxCR_DMAREQ_ID, Request); } @@ -1188,7 +1158,6 @@ __STATIC_INLINE void LL_DMA_SetPeriphRequest(DMA_TypeDef *DMAx, uint32_t Channel */ __STATIC_INLINE uint32_t LL_DMA_GetPeriphRequest(DMA_TypeDef *DMAx, uint32_t Channel) { - (void)DMAx; return (READ_BIT(__LL_DMA_INSTANCE_TO_DMAMUX_CCR(DMAx, Channel - 1U)->CxCR, DMAMUX_CxCR_DMAREQ_ID)); } @@ -1928,7 +1897,6 @@ __STATIC_INLINE void LL_DMA_ClearFlag_TE8(DMA_TypeDef *DMAx) */ __STATIC_INLINE void LL_DMA_EnableIT_TC(DMA_TypeDef *DMAx, uint32_t Channel) { - (void)DMAx; SET_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_TCIE); } @@ -1949,7 +1917,6 @@ __STATIC_INLINE void LL_DMA_EnableIT_TC(DMA_TypeDef *DMAx, uint32_t Channel) */ __STATIC_INLINE void LL_DMA_EnableIT_HT(DMA_TypeDef *DMAx, uint32_t Channel) { - (void)DMAx; SET_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_HTIE); } @@ -1970,7 +1937,6 @@ __STATIC_INLINE void LL_DMA_EnableIT_HT(DMA_TypeDef *DMAx, uint32_t Channel) */ __STATIC_INLINE void LL_DMA_EnableIT_TE(DMA_TypeDef *DMAx, uint32_t Channel) { - (void)DMAx; SET_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_TEIE); } @@ -1991,7 +1957,6 @@ __STATIC_INLINE void LL_DMA_EnableIT_TE(DMA_TypeDef *DMAx, uint32_t Channel) */ __STATIC_INLINE void LL_DMA_DisableIT_TC(DMA_TypeDef *DMAx, uint32_t Channel) { - (void)DMAx; CLEAR_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_TCIE); } @@ -2012,7 +1977,6 @@ __STATIC_INLINE void LL_DMA_DisableIT_TC(DMA_TypeDef *DMAx, uint32_t Channel) */ __STATIC_INLINE void LL_DMA_DisableIT_HT(DMA_TypeDef *DMAx, uint32_t Channel) { - (void)DMAx; CLEAR_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_HTIE); } @@ -2033,7 +1997,6 @@ __STATIC_INLINE void LL_DMA_DisableIT_HT(DMA_TypeDef *DMAx, uint32_t Channel) */ __STATIC_INLINE void LL_DMA_DisableIT_TE(DMA_TypeDef *DMAx, uint32_t Channel) { - (void)DMAx; CLEAR_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_TEIE); } @@ -2054,7 +2017,6 @@ __STATIC_INLINE void LL_DMA_DisableIT_TE(DMA_TypeDef *DMAx, uint32_t Channel) */ __STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_TC(DMA_TypeDef *DMAx, uint32_t Channel) { - (void)DMAx; return ((READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_TCIE) == (DMA_CCR_TCIE)) ? 1UL : 0UL); } @@ -2076,7 +2038,6 @@ __STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_TC(DMA_TypeDef *DMAx, uint32_t Chann */ __STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_HT(DMA_TypeDef *DMAx, uint32_t Channel) { - (void)DMAx; return ((READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_HTIE) == (DMA_CCR_HTIE)) ? 1UL : 0UL); } @@ -2098,7 +2059,6 @@ __STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_HT(DMA_TypeDef *DMAx, uint32_t Chann */ __STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_TE(DMA_TypeDef *DMAx, uint32_t Channel) { - (void)DMAx; return ((READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_TEIE) == (DMA_CCR_TEIE)) ? 1UL : 0UL); } diff --git a/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_ll_radio_timer.h b/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_ll_radio_timer.h index db5808c58d..e3618cfc1d 100644 --- a/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_ll_radio_timer.h +++ b/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_ll_radio_timer.h @@ -445,8 +445,6 @@ __STATIC_INLINE uint32_t LL_RADIO_TIMER_IsEnabledCPUWakeupTimerForceSleeping(WAK __STATIC_INLINE void LL_RADIO_TIMER_SetSleepRequestMode(WAKEUP_TypeDef *WAKEUPx, uint8_t mode) { #if defined(STM32WB09) - (void)WAKEUPx; // No operation for STM32WB09 - (void)mode; // No operation for STM32WB09 return; #else MODIFY_REG_FIELD(WAKEUP->BLUE_SLEEP_REQUEST_MODE, WAKEUP_BLUE_SLEEP_REQUEST_MODE_SLEEP_REQ_MODE, (mode & 0x7)); @@ -462,7 +460,6 @@ __STATIC_INLINE void LL_RADIO_TIMER_SetSleepRequestMode(WAKEUP_TypeDef *WAKEUPx, __STATIC_INLINE uint32_t LL_RADIO_TIMER_GetSleepRequestMode(WAKEUP_TypeDef *WAKEUPx) { #if defined(STM32WB09) - (void)WAKEUPx; // No operation for STM32WB09 return 0; #else return (uint32_t)(READ_REG(WAKEUP->BLUE_SLEEP_REQUEST_MODE) & WAKEUP_BLUE_SLEEP_REQUEST_MODE_SLEEP_REQ_MODE); diff --git a/system/Drivers/STM32WB0x_HAL_Driver/Release_Notes.html b/system/Drivers/STM32WB0x_HAL_Driver/Release_Notes.html index f760d1625c..51aa0a80bc 100644 --- a/system/Drivers/STM32WB0x_HAL_Driver/Release_Notes.html +++ b/system/Drivers/STM32WB0x_HAL_Driver/Release_Notes.html @@ -1,31 +1,22 @@ - - - - - - Release Notes for STM32CubeWB0 HAL Drivers Package - - - + + +
@@ -33,70 +24,53 @@

Release Notes for

STM32WB0x HAL Drivers

Copyright © 2024 STMicroelectronics

- +

Purpose

-

The STM32Cube HAL and LL, an STM32 abstraction layer embedded -software, ensure maximized portability across STM32 portfolio.

-

The portable APIs layer provides a generic, multi instanced and -simple set of APIs to interact with the upper layer (application, -libraries and stacks). It is composed of native and extended APIs set. -It is directly built around a generic architecture and allows the -build-upon layers, like the middleware layer, to implement its functions -without knowing in-depth the used STM32 device. This improves the -library code reusability and guarantees an easy portability on other -devices and STM32 families.

-

The Low Layer (LL) drivers are part of the STM32Cube firmware HAL -that provides a basic set of optimized and one shot services. The Low -layer drivers, contrary to the HAL ones are not fully portable across -the STM32 families; the availability of some functions depends on the -physical availability of the relative features on the product. The Low -Layer (LL) drivers are designed to offer the following features:

-
    -
  • New set of inline functions for direct and atomic register -access
    • -
  • One-shot operations that can be used by the HAL drivers or from -application level
    • -
  • Full independence from HAL and standalone usage (without HAL -drivers)
    • +

    The STM32Cube HAL and LL, an STM32 abstraction layer embedded software, ensure maximized portability across STM32 portfolio.

    +

    The portable APIs layer provides a generic, multi instanced and simple set of APIs to interact with the upper layer (application, libraries and stacks). It is composed of native and extended APIs set. It is directly built around a generic architecture and allows the build-upon layers, like the middleware layer, to implement its functions without knowing in-depth the used STM32 device. This improves the library code reusability and guarantees an easy portability on other devices and STM32 families.

    +

    The Low Layer (LL) drivers are part of the STM32Cube firmware HAL that provides a basic set of optimized and one shot services. The Low layer drivers, contrary to the HAL ones are not fully portable across the STM32 families; the availability of some functions depends on the physical availability of the relative features on the product. The Low Layer (LL) drivers are designed to offer the following features:

    +
      +
    • New set of inline functions for direct and atomic register access
      • +
    • One-shot operations that can be used by the HAL drivers or from application level
      • +
    • Full independence from HAL and standalone usage (without HAL drivers)
    • Full features coverage of all the supported peripherals
-
-

Update History

+
+

Update History

- - +

Main Changes

    -
  • Release of STM32CubeWB0 Firmware package supporting -STM32WB0x devices
    • +
  • Release of STM32CubeWB0 Firmware package supporting STM32WB0x devices

Contents

HAL Drivers updates

    -
  • HAL RCC driver +
  • HAL Radio Timer driver
      -
    • Added support for RCC_LPUART1_CLKSOURCE_16M with a -frequency of 16,000,000
      • +
    • Optimizations of the HAL_RADIO_TIMER_SetRadioTimerValue function.
    • -
  • HAL Radio Timer driver +
  • HAL Radio driver
      -
    • Fix in HAL_RADIO_TIMER_SetRadioCloseTimeout() for an issue that may -happen in case LSE has high jitter.
      • +
    • Added functions related to new RRM Radio interrupt.
    • -
-

LL Drivers updates

+
  • HAL Generic driver
      -
    • LL RCC driver +
    • Fixed timer timebase initialization sequence by registering the callback before starting the timer to ensure correct callback handling in FreeRTOS projects
      • +
    • +
  • HAL LPUART driver +
      +
    • Fix transfer count underflow when using polling mode.
      • +
    • +
  • HAL UART driver
      -
    • Add LL RCC APIs to manage RTC clock: LL_RCC_EnableRTC(), -LL_RCC_DisableRTC() and LL_RCC_IsEnabledRTC()
      • +
    • Fix transfer count underflow when using polling mode.
    • -


    +


    Supported Devices and boards

      @@ -133,31 +107,88 @@

      Notes

    - - +

    Main Changes

      -
    • Release of STM32CubeWB0 Firmware package supporting -STM32WB0x devices
      • +
    • Release of STM32CubeWB0 Firmware package supporting STM32WB0x devices

    Contents

    HAL Drivers updates

      +
    • HAL RCC driver +
        +
      • Added support for RCC_LPUART1_CLKSOURCE_16M with a frequency of 16,000,000
        • +
      • +
    • HAL Radio Timer driver +
        +
      • Fix in HAL_RADIO_TIMER_SetRadioCloseTimeout() for an issue that may happen in case LSE has high jitter.
        • +
      • +
    +

    LL Drivers updates

    +
      +
    • LL RTC driver +
        +
      • Add LL RCC APIs to manage RTC clock: LL_RCC_EnableRTC(), LL_RCC_DisableRTC() and LL_RCC_IsEnabledRTC()
        • +
      • +
    +


    +

    +

    Supported Devices and boards

    +
      +
    • Devices : +
        +
      • STM32WB05
        • +
      • STM32WB06
        • +
      • STM32WB07
        • +
      • STM32WB09
        • +
      • +
    • Boards : +
        +
      • NUCLEO-WB09KE
        • +
      • NUCLEO-WB07CC
        • +
      • NUCLEO-WB05KZ
        • +
      • +
    +

    Backward compatibility

    +
      +
    • Not applicable
      • +
    +

    Known Limitations

    +
      +
    • None
      • +
    +

    Dependencies

    +
      +
    • None
      • +
    +

    Notes

    +
      +
    • None
      • +
    +
    +
    +
    + +
    +

    Main Changes

    +
      +
    • Release of STM32CubeWB0 Firmware package supporting STM32WB0x devices
      • +
    +

    Contents

    +

    HAL Drivers updates

    +
    • HAL RADIO TIMER driver
      • Improved performances for the radio activity schedule
    • HAL GPIO driver
        -
      • Managed mask registers manipulation to allow the activation of all -interrupts in the HAL_GPIO_Deinit function.
        • +
      • Managed mask registers manipulation to allow the activation of all interrupts in the HAL_GPIO_Deinit function.
    • HAL SMBUS driver
        -
      • Remove extra parenthesis in c files for driver HAL I2C and -SMBUS
        • +
      • Remove extra parenthesis in c files for driver HAL I2C and SMBUS
    • HAL I2S driver
        @@ -171,22 +202,16 @@

        HAL Drivers updates

    • HAL UART driver
        -
      • Provide accurate position in RxEventCallback when ReceptionToIdle -mode is used with DMA, when UART and DMA interrupts process is -delayed
        • -
      • Correct DMA Rx abort procedure impact on ongoing Tx transfer in -polling mode
        • -
      • Correct references to HAL_UARTEx_WakeupCallback and to -HAL_UART_WAKEUP_CB_ID define, according to series capabilities
        • +
      • Provide accurate position in RxEventCallback when ReceptionToIdle mode is used with DMA, when UART and DMA interrupts process is delayed
        • +
      • Correct DMA Rx abort procedure impact on ongoing Tx transfer in polling mode
        • +
      • Correct references to HAL_UARTEx_WakeupCallback and to HAL_UART_WAKEUP_CB_ID define, according to series capabilities
      • Corrections in CHM/PDF rendering for HAL_UART
    • HAL USART driver
      • Correct wrong comment in HAL_USARTEx_DisableFifoMode() function
        • -
      • Improve the visibility of the SPI function support in HAL USART -description
        • -
      • Align prescaler value used by default in USART_GET_DIV_FACTOR macro -with RM
        • +
      • Improve the visibility of the SPI function support in HAL USART description
        • +
      • Align prescaler value used by default in USART_GET_DIV_FACTOR macro with RM

    LL Drivers updates

    @@ -197,14 +222,12 @@

    LL Drivers updates

  • LL USART driver
      -
    • Solve Coverity out-of-bound memory access warning in use of -USART_PRESCALER_TAB array
      • +
    • Solve Coverity out-of-bound memory access warning in use of USART_PRESCALER_TAB array
    • -


    +


    -

    Supported Devices and -boards

    +

    Supported Devices and boards

    • Devices :
        @@ -220,65 +243,58 @@

        Supported Devices and
      • NUCLEO-WB05KZ

    -

    Backward compatibility

    +

    Backward compatibility

    • Not applicable
    -

    Known Limitations

    +

    Known Limitations

    • None
    -

    Dependencies

    +

    Dependencies

    • None
    -

    Notes

    +

    Notes

    • None
    - - +
    -

    Main Changes

    +

    Main Changes

      -
    • Release of STM32CubeWB0 Firmware package supporting -STM32WB0x devices
      • +
    • Release of STM32CubeWB0 Firmware package supporting STM32WB0x devices
    -

    Contents

    -

    HAL Drivers updates

    +

    Contents

    +

    HAL Drivers updates

    • HAL ADC driver
        -
      • Correct function listed in the top-level comment of file hal_adc.c : -paragraph Deinitialization of ADC.
        • +
      • Correct function listed in the top-level comment of file hal_adc.c : paragraph Deinitialization of ADC.
    • HAL FLASH driver
      • Add LL_FLASH_FLAG Definition.
    -


    +


    LL Drivers updates

    • LL ADC driver
        -
      • Remove LL_ADC_CHANNEL_TEMPSENSOR/VBAT from parameter list of -LL_ADC_Get/SetChannelVoltageRange().
        • +
      • Remove LL_ADC_CHANNEL_TEMPSENSOR/VBAT from parameter list of LL_ADC_Get/SetChannelVoltageRange().
    • LL RCC driver
        -
      • Involves reading flags from the mirrored address instead of the -register address.
        • +
      • Involves reading flags from the mirrored address instead of the register address.
    • LL RNG driver
        -
      • Remove the BP_POSTP bit of the RNG_CR from CMSIS, is reserved for -internal testing only.
        • +
      • Remove the BP_POSTP bit of the RNG_CR from CMSIS, is reserved for internal testing only.
      • Add LL_RNG functions to acknowledge WB09 RNG interrupts.
    • LL SYSTEM driver @@ -287,12 +303,10 @@

      LL Drivers updates

  • LL ADC driver
      -
    • Fix incorrect values returned by LL_UTILS_GetPackageType() function -due to invalid mask.
      • +
    • Fix incorrect values returned by LL_UTILS_GetPackageType() function due to invalid mask.
    • -

    Supported Devices and -boards

    +

    Supported Devices and boards

    • Devices :
        @@ -308,50 +322,41 @@

        Supported Devices and
      • NUCLEO-WB05KZ

    -

    Backward compatibility

    +

    Backward compatibility

    • Not applicable
    -

    Known Limitations

    +

    Known Limitations

    • None
    -

    Dependencies

    +

    Dependencies

    • None
    -

    Notes

    +

    Notes

    • None
    - - +
    -

    Main Changes

    +

    Main Changes

      -
    • First release of STM32CubeWB0 Firmware package -supporting STM32WB0x devices
      • +
    • First release of STM32CubeWB0 Firmware package supporting STM32WB0x devices
    -

    Contents

    -

    First -Release of HAL/LL Drivers for -STM32WB0x series

    +

    Contents

    +

    First Release of HAL/LL Drivers for STM32WB0x series

    • HAL/LL Drivers are available for all peripherals:
        -

      • HAL: ADC, CORTEX, CRC, CRS, DMA, FLASH, GPIO, -I2C, I2S, IRDA, IWDG, PKA, PWR, RADIO, RCC, RNG, RTC, SMARTCARD, SMBUS, -SPI, TIM, UART, USART

        • -

      • LL: ADC, CRC, DMA, GPIO, I2C, LPUART, PKA, PWR, -RCC, RNG, RTC, SPI, TIM, USART, UTILS

        • +

      • HAL: ADC, CORTEX, CRC, CRS, DMA, FLASH, GPIO, I2C, I2S, IRDA, IWDG, PKA, PWR, RADIO, RCC, RNG, RTC, SMARTCARD, SMBUS, SPI, TIM, UART, USART

        • +

      • LL: ADC, CRC, DMA, GPIO, I2C, LPUART, PKA, PWR, RCC, RNG, RTC, SPI, TIM, USART, UTILS

    -

    Supported Devices and -boards

    +

    Supported Devices and boards

    • Devices :
        @@ -367,38 +372,35 @@

        Supported Devices and
      • NUCLEO-WB05KZ

    -

    Backward compatibility

    +

    Backward compatibility

    • Not applicable
    -

    Known Limitations

    +

    Known Limitations

    • None
    -

    Dependencies

    +

    Dependencies

    • None
    -

    Notes

    +

    Notes

    • None
    - +
    -
    -
    -

    For complete documentation on STM32 Microcontrollers , visit: -www.st.com/stm32

    -

    This release note uses up to date web standards and, for this -reason, should not be opened with Internet Explorer but preferably with -popular browsers such as Google Chrome, Mozilla Firefox, Opera or -Microsoft Edge.

    -
    +
    +
    +

    For complete documentation on STM32 Microcontrollers , visit: www.st.com/stm32

    +

    This release note uses up to date web standards and, for this reason, should not be opened with Internet Explorer but preferably with popular browsers such as Google Chrome, Mozilla Firefox, Opera or Microsoft Edge.

    +

    Info

    - - \ No newline at end of file + + + diff --git a/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_flash_ex.c b/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_flash_ex.c index 6bded19a19..fe66a0a89e 100644 --- a/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_flash_ex.c +++ b/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_flash_ex.c @@ -109,7 +109,7 @@ static void FLASH_KeyWrite(void); */ HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError) { - HAL_StatusTypeDef status = HAL_ERROR; + HAL_StatusTypeDef status; uint32_t index; /* Check the parameters */ diff --git a/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_radio.c b/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_radio.c index 401e876729..f0374b4d55 100644 --- a/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_radio.c +++ b/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_radio.c @@ -22,7 +22,6 @@ /** @addtogroup STM32WB0x_HAL_Driver * @{ */ -#ifdef HAL_RADIO_MODULE_ENABLED /** @addtogroup RADIO * @{ @@ -71,11 +70,6 @@ * @{ */ -/* initDelay */ -#define INITDELAY_WAKEUP (0x40U) -#define INITDELAY_TIMER12_CAL (0x3FU) -#define INITDELAY_TIMER2_NOCAL (0x9U) - /* Init_radio_delay */ #if defined (STM32WB05) || defined(STM32WB09 ) #define DELAYCHK_TRANSMIT_CAL (0x5AU) @@ -103,8 +97,6 @@ #if defined (STM32WB06) || defined(STM32WB07) #define TXREADY_TIMEOUT (0x5U) #endif -#define TXDELAY_START (0x10U) -#define TXDELAY_END (0x10U) /* RX parameter init */ #define RCV_TIMEOUT (0x100) @@ -299,9 +291,9 @@ void HAL_RADIO_Init(RADIO_HandleTypeDef *hradio) #endif /* STM32WB05 or STM32WB09 */ /*Set InitDelay*/ - LL_RADIO_SetWakeupInitDelay(INITDELAY_WAKEUP); - LL_RADIO_SetTimer12InitDelayCal(INITDELAY_TIMER12_CAL); - LL_RADIO_SetTimer12InitDelayNoCal(INITDELAY_TIMER2_NOCAL); + LL_RADIO_SetWakeupInitDelay(RADIO_INITDELAY_WAKEUP); + LL_RADIO_SetTimer12InitDelayCal(RADIO_INITDELAY_TIMER12_CAL); + LL_RADIO_SetTimer12InitDelayNoCal(RADIO_INITDELAY_TIMER2_NOCAL); /*Set Init_radio_delay*/ LL_RADIO_SetReceivedCalDelayChk(DELAYCHK_RECEIVE_CAL); @@ -312,8 +304,8 @@ void HAL_RADIO_Init(RADIO_HandleTypeDef *hradio) /* Initial and final TX delays: control the on-air start time of the TX packet * and the length of the packet "tail" after last bit is transmitted */ - LL_RADIO_SetTxDelayStart(TXDELAY_START); - LL_RADIO_SetTxDelayEnd(TXDELAY_END); + LL_RADIO_SetTxDelayStart(RADIO_TXDELAY_START); + LL_RADIO_SetTxDelayEnd(RADIO_TXDELAY_END); /* Timeout for TX ready signal from the radio FSM after the 2nd init phase * has expired @@ -394,6 +386,9 @@ void HAL_RADIO_Init(RADIO_HandleTypeDef *hradio) RRM->UDRA_CTRL0 = RRM_UDRA_CTRL0_RELOAD_RDCFGPTR; LL_RADIO_Active2ErrorInterrupt_Enable(); + /* Enable RRM Port Grant interrupt */ + SET_BIT(RRM->BLE_IRQ_ENABLE, RRM_BLE_IRQ_ENABLE_PORT_GRANT); + #if USE_RADIO_PROPRIETARY_DRIVER globalParameters.back2backTime = BACK_TO_BACK_TIME; globalParameters.tone_start_stop_flag = 0; @@ -1751,6 +1746,9 @@ __weak void HAL_RADIO_TxRxCallback(uint32_t flags) { } +__weak void HAL_RADIO_RRMCallback(uint32_t ble_irq_status) +{ +} __weak void HAL_RADIO_TxRxSeqCallback(void) { @@ -1761,7 +1759,7 @@ void HAL_RADIO_TXRX_IRQHandler(void) uint32_t blue_status = BLUE->STATUSREG; uint32_t blue_interrupt = BLUE->INTERRUPT1REG; - /** clear all pending interrupts */ + /* clear all pending interrupts */ BLUE->INTERRUPT1REG = blue_interrupt; HAL_RADIO_TIMER_EndOfRadioActivityIsr(); @@ -1782,6 +1780,19 @@ void HAL_RADIO_TXRX_IRQHandler(void) blue_interrupt = BLUE->INTERRUPT1REG; } +void HAL_RADIO_RRM_IRQHandler(void) +{ + uint32_t ble_irq_status = RRM->BLE_IRQ_STATUS; + + /* Clear RRM Status register */ + RRM->BLE_IRQ_STATUS = ble_irq_status; + + HAL_RADIO_RRMCallback(ble_irq_status); + + /* Ensure flag is cleared */ + ble_irq_status = RRM->BLE_IRQ_STATUS; +} + void HAL_RADIO_TXRX_SEQ_IRQHandler(void) { @@ -1791,7 +1802,7 @@ void HAL_RADIO_TXRX_SEQ_IRQHandler(void) /** * @} */ -#endif /* HAL_RADIO_MODULE_ENABLED */ + /** * @} */ diff --git a/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_radio_timer.c b/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_radio_timer.c index f7fd62160a..f34bbafecb 100644 --- a/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_radio_timer.c +++ b/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_radio_timer.c @@ -56,7 +56,7 @@ /** @addtogroup STM32WB0x_HAL_Driver * @{ */ -#ifdef HAL_RADIO_TIMER_MODULE_ENABLED + /** @addtogroup RADIO_TIMER * @brief HAL RADIO TIMER module driver * @{ @@ -71,6 +71,7 @@ typedef struct { uint8_t periodicCalibration; /*!< Periodic calibration enable status */ uint32_t periodicCalibrationInterval; /*!< Periodic calibration interval in ms, to disable set to 0 */ + uint32_t periodicCalibrationIntervalMTU; /*!< Periodic calibration interval in Machine Time Unit, to disable set to 0 */ bool calibration_in_progress; /*!< Flag to indicate that a periodic calibration has been started */ } CalibrationSettingsTypeDef; @@ -81,8 +82,7 @@ typedef struct int32_t freq1; /** Round(((freq/64)*0x753)/256) */ int32_t period1; /** Round (( ((period /256) * 0x8BCF6) + (((period % 256)* 0x8BCF6)/256)) / 32) */ int32_t last_period1; /** Period global in last calibration */ - uint64_t last_calibration_time; /** Absolute system time when last calibration was performed */ - uint32_t calibration_machine_interval; /** Calibration Interval MTU */ + uint64_t nextCalibrationEvent; /** Absolute system time when next calibration will be performed */ uint8_t calibration_data_available; /** Flag to signal if a new calibration data is available or not */ } CalibrationDataTypeDef; @@ -114,9 +114,10 @@ typedef struct VTIMER_HandleType calibrationTimer; RADIO_TIMER_RadioHandleTypeDef radioTimer; uint32_t hs_startup_time; /*!< HS startup time */ - uint64_t cumulative_time; /** Absolute system time since power up */ - uint64_t last_system_time; /** Last System Time */ - uint32_t last_machine_time; /** Last machine time used to update cumulative time */ + uint64_t last_calib_system_time; /** Absolute system time of last calibration since power up */ + uint32_t last_calib_machine_time; /** Last calibration machine time used to update cumulative time */ + uint64_t last_system_time; /** Last System Time since power up*/ + uint32_t last_machine_time; /** Last Machine Time used paired with last_system_time */ uint8_t last_setup_time; /**setup time of last timer programmed*/ uint32_t last_anchor_mt; VTIMER_HandleType *rootNode; /*!< First timer of the host timer queue */ @@ -189,6 +190,9 @@ it is not sure the timer can be cleared properly */ #define RADIO_TX_RX_EXCEPTION_NUMBER 18 #endif +/* This is the maximum timeout that can be used to program a timer with 32 bits */ +#define HAL_RADIO_TIMER_MAX_32BIT_TIMEOUT (0xFFFFFFFF - 410) + /** * @} */ @@ -263,19 +267,19 @@ static void _updateCalibrationData(void); static uint32_t _us_to_systime(uint32_t time); static uint32_t _us_to_machinetime(uint32_t time); -static void _configureTxRxDelay(RADIO_TIMER_ContextTypeDef *context, uint8_t calculate_st); +static void _configureTxRxDelay(uint8_t calculate_st); static void _update_xtal_startup_time(uint16_t hs_startup_time, int32_t freq1); uint32_t blue_unit_conversion(uint32_t time, uint32_t period_freq, uint32_t thr); /* Translate MTU to STU and vice-versa. It is implemented using integer operation. */ -static uint64_t _get_system_time_and_machine(RADIO_TIMER_ContextTypeDef *context, uint32_t *current_machine_time); +static void _update_calibration_time(void); +static void _update_system_and_machine_time(void); static int32_t _start_timer(VTIMER_HandleType *timerHandle, uint64_t time); static VTIMER_HandleType *_update_user_timeout(VTIMER_HandleType *rootNode, uint8_t *expired); static VTIMER_HandleType *_insert_timer_in_queue(VTIMER_HandleType *rootNode, VTIMER_HandleType *handle); static void _virtualTimeBaseEnable(FunctionalState state); static VTIMER_HandleType *_remove_timer_in_queue(VTIMER_HandleType *rootNode, VTIMER_HandleType *handle); static VTIMER_HandleType *_check_callbacks(VTIMER_HandleType *rootNode, VTIMER_HandleType **expiredList); -static void _update_system_time(RADIO_TIMER_ContextTypeDef *context); -static void _check_radio_activity(RADIO_TIMER_RadioHandleTypeDef *timerHandle, uint8_t *expired); +static uint8_t _check_radio_activity(uint8_t update_sys_time); #if defined (STM32WB06) || defined (STM32WB07) static uint32_t TIMER_SetRadioHostWakeupTime(uint32_t delay, bool *share); static void _set_controller_as_host(void); @@ -283,7 +287,7 @@ static void _check_host_activity(void); #else static uint32_t VTIMER_SetWakeupTime(uint32_t delay, bool allow_sleep); #endif -static uint8_t TIMER_SetRadioTimerValue(uint32_t timeout, bool event_type, bool cal_req); +static uint8_t TIMER_SetRadioTimerValue(void); static uint64_t TIMER_GetPastSysTime(uint32_t time, uint64_t *current_system_time); static bool TIMER_SleepCheck(void); static uint8_t TIMER_GetRadioTimerValue(uint32_t *time); @@ -337,8 +341,6 @@ void HAL_RADIO_TIMER_Init(RADIO_TIMER_InitTypeDef *RADIO_TIMER_InitStruct) if (RADIO_TIMER_InitStruct->periodicCalibrationInterval == 0) { RADIO_TIMER_Context.calibrationSettings.periodicCalibrationInterval = HAL_RADIO_TIMER_MachineTimeToSysTime(0x50000000); - - } else { @@ -354,12 +356,11 @@ void HAL_RADIO_TIMER_Init(RADIO_TIMER_InitTypeDef *RADIO_TIMER_InitStruct) /* Init Radio Timer Context */ RADIO_TIMER_Context.last_setup_time = 0; - RADIO_TIMER_Context.cumulative_time = 0; - RADIO_TIMER_Context.last_machine_time = LL_RADIO_TIMER_GetAbsoluteTime(WAKEUP); + RADIO_TIMER_Context.last_calib_system_time = 0; + RADIO_TIMER_Context.last_calib_machine_time = LL_RADIO_TIMER_GetAbsoluteTime(WAKEUP); RADIO_TIMER_Context.last_system_time = 0; - RADIO_TIMER_Context.calibrationData.last_calibration_time = 0; RADIO_TIMER_Context.calibrationData.calibration_data_available = 0; - RADIO_TIMER_Context.calibrationData.calibration_machine_interval = blue_unit_conversion(RADIO_TIMER_Context.calibrationSettings.periodicCalibrationInterval, + RADIO_TIMER_Context.calibrationSettings.periodicCalibrationIntervalMTU = blue_unit_conversion(RADIO_TIMER_Context.calibrationSettings.periodicCalibrationInterval, RADIO_TIMER_Context.calibrationData.freq1, MULT64_THR_FREQ); RADIO_TIMER_Context.wakeup_calibration = RADIO_TIMER_Context.calibrationSettings.periodicCalibration; @@ -381,9 +382,8 @@ void HAL_RADIO_TIMER_Init(RADIO_TIMER_InitTypeDef *RADIO_TIMER_InitStruct) RADIO_TIMER_Context.calibrationTimer.userData = NULL; _start_timer(&RADIO_TIMER_Context.calibrationTimer, HAL_RADIO_TIMER_GetCurrentSysTime() + RADIO_TIMER_Context.calibrationSettings.periodicCalibrationInterval); - /* Tx & Rx delay configuration */ - _configureTxRxDelay(&RADIO_TIMER_Context, TRUE); + _configureTxRxDelay(TRUE); } /** @@ -396,16 +396,6 @@ void HAL_RADIO_TIMER_Tick(void) { uint8_t expired = 0; - ATOMIC_SECTION_BEGIN(); - if (RADIO_TIMER_Context.radioTimer.active) - { - if (RADIO_TIMER_Context.radioTimer.expiryTime < HAL_RADIO_TIMER_GetCurrentSysTime()) - { - RADIO_TIMER_Context.radioTimer.active = FALSE; - } - } - ATOMIC_SECTION_END(); - /* Check for expired timers */ while (DIFF8(RADIO_TIMER_Context.expired_count, RADIO_TIMER_Context.served_count)) { @@ -452,12 +442,6 @@ void HAL_RADIO_TIMER_Tick(void) { /* Collect calibration data */ _updateCalibrationData(); - RADIO_TIMER_Context.rootNode = _update_user_timeout(RADIO_TIMER_Context.rootNode, &expired); - if (expired == 1) - { - /* A new root timer is already expired, mimic timer expire */ - INCREMENT_EXPIRE_COUNT; - } } #if defined (STM32WB06) || defined (STM32WB07) @@ -465,17 +449,9 @@ void HAL_RADIO_TIMER_Tick(void) { RADIO_TIMER_Context.waitCal = 0; RADIO_TIMER_Context.radioTimer.pending = TRUE; - _check_radio_activity(&RADIO_TIMER_Context.radioTimer, &expired); - RADIO_TIMER_Context.rootNode = _update_user_timeout(RADIO_TIMER_Context.rootNode, &expired); - if (expired == 1) - { - /* A new root timer is already expired, mimic timer expire */ - INCREMENT_EXPIRE_COUNT; - } } -#else - _check_radio_activity(&RADIO_TIMER_Context.radioTimer, &expired); //Start Radio Timer after calibration #endif + _check_radio_activity(TRUE); //Start Radio Timer after calibration /* Schedule next calibration event */ HAL_RADIO_TIMER_StopVirtualTimer(&RADIO_TIMER_Context.calibrationTimer); @@ -488,7 +464,7 @@ void HAL_RADIO_TIMER_Tick(void) { if (RADIO_TIMER_Context.calibrationSettings.periodicCalibration) { - if (HAL_RADIO_TIMER_GetCurrentSysTime() > (RADIO_TIMER_Context.calibrationData.last_calibration_time + + if (HAL_RADIO_TIMER_GetCurrentSysTime() > (RADIO_TIMER_Context.last_calib_system_time + TIMER_SYSTICK_PER_FIVE_SECONDS)) { HAL_RADIO_TIMER_StopVirtualTimer(&RADIO_TIMER_Context.calibrationTimer); @@ -610,37 +586,40 @@ PowerSaveLevels HAL_RADIO_TIMER_PowerSaveLevelCheck(void) * @param event_type: Specify if it is a TX (1) or RX (0) event. * @param cal_req: Specify if PLL calibration is requested (1) or not (0). * @retval 0 if radio activity has been scheduled successfully. - * @retval 1 if radio activity has been rejected (it is too close or in the past). + * @retval 1 if radio activity has been rejected. */ uint32_t HAL_RADIO_TIMER_SetRadioTimerValue(uint32_t time, uint8_t event_type, uint8_t cal_req) { uint8_t retVal = 0; -#if defined (STM32WB06) || defined (STM32WB07) - uint64_t current_time; -#endif RADIO_TIMER_Context.radioTimer.event_type = event_type; RADIO_TIMER_Context.radioTimer.cal_req = cal_req; - RADIO_TIMER_Context.radioTimer.expiryTime = RADIO_TIMER_Context.calibrationData.last_calibration_time + (uint32_t)(time - (uint32_t)RADIO_TIMER_Context.calibrationData.last_calibration_time); RADIO_TIMER_Context.radioTimer.active = FALSE; RADIO_TIMER_Context.radioTimer.intTxRx_to_be_served = FALSE; RADIO_TIMER_Context.radioTimer.pending = TRUE; + ATOMIC_SECTION_BEGIN(); + RADIO_TIMER_Context.radioTimer.expiryTime = HAL_RADIO_TIMER_GetFutureSysTime64(time); + if(RADIO_TIMER_Context.radioTimer.expiryTime - RADIO_TIMER_Context.last_system_time > HAL_RADIO_TIMER_MAX_32BIT_TIMEOUT) + { + RADIO_TIMER_Context.radioTimer.pending = FALSE; + ATOMIC_SECTION_END(); + return 1; + } #if defined (STM32WB06) || defined (STM32WB07) - current_time = HAL_RADIO_TIMER_GetCurrentSysTime(); if (RADIO_TIMER_Context.rootNode == NULL) { - _check_radio_activity(&RADIO_TIMER_Context.radioTimer, &retVal); + retVal = _check_radio_activity(FALSE); } else { - if (RADIO_TIMER_Context.rootNode->expiryTime < current_time || + if (RADIO_TIMER_Context.rootNode->expiryTime < RADIO_TIMER_Context.last_system_time || ((RADIO_TIMER_Context.radioTimer.expiryTime < (RADIO_TIMER_Context.rootNode->expiryTime + RADIO_TIMER_Context.hostMargin)) && RADIO_TIMER_Context.rootNode->active) || !RADIO_TIMER_Context.rootNode->active) { /* Program the radio timer */ - _check_radio_activity(&RADIO_TIMER_Context.radioTimer, &retVal); + retVal = _check_radio_activity(FALSE); if ((RADIO_TIMER_Context.radioTimer.expiryTime >= RADIO_TIMER_Context.rootNode->expiryTime) && RADIO_TIMER_Context.rootNode->active) { @@ -658,11 +637,11 @@ uint32_t HAL_RADIO_TIMER_SetRadioTimerValue(uint32_t time, uint8_t event_type, u } } #else - _check_radio_activity(&RADIO_TIMER_Context.radioTimer, &retVal); + retVal = _check_radio_activity(FALSE); #endif + ATOMIC_SECTION_END(); _virtualTimeBaseEnable(ENABLE); - return retVal; } @@ -841,7 +820,12 @@ void HAL_RADIO_TIMER_RadioTimerIsr(void) */ void HAL_RADIO_TIMER_EndOfRadioActivityIsr(void) { + if (RADIO_TIMER_Context.radioTimer.active) + { + RADIO_TIMER_Context.radioTimer.active = FALSE; + } RADIO_TIMER_Context.radioTimer.intTxRx_to_be_served = FALSE; + } /* ----------------------- Radio Timer time unit APIs ------------------------*/ @@ -877,8 +861,8 @@ uint32_t HAL_RADIO_TIMER_MachineTimeToSysTime(uint32_t time) */ uint64_t HAL_RADIO_TIMER_GetCurrentSysTime(void) { - uint32_t current_machine_time; - return _get_system_time_and_machine(&RADIO_TIMER_Context, ¤t_machine_time); + _update_system_and_machine_time(); + return RADIO_TIMER_Context.last_system_time; } /** @@ -985,9 +969,10 @@ uint64_t HAL_RADIO_TIMER_ExpiryTime(VTIMER_HandleType *timerHandle) void HAL_RADIO_TIMER_WakeUpCallback(void) { volatile uint32_t status = 0; - uint8_t expired; UNUSED(status); - _check_radio_activity(&RADIO_TIMER_Context.radioTimer, &expired); + + _check_radio_activity(TRUE); + if (RADIO_TIMER_Context.hostIsRadioPending) { RADIO_TIMER_Context.hostIsRadioPending = 0; @@ -1047,7 +1032,7 @@ uint64_t HAL_RADIO_TIMER_GetSysTime64(uint32_t sys_time) { uint64_t time; - time = RADIO_TIMER_Context.calibrationData.last_calibration_time + (uint32_t)(sys_time - (uint32_t)RADIO_TIMER_Context.calibrationData.last_calibration_time); + time = RADIO_TIMER_Context.last_calib_system_time + (uint32_t)(sys_time - (uint32_t)RADIO_TIMER_Context.last_calib_system_time); return time; } @@ -1061,13 +1046,11 @@ uint64_t HAL_RADIO_TIMER_GetSysTime64(uint32_t sys_time) */ uint64_t HAL_RADIO_TIMER_GetFutureSysTime64(uint32_t sys_time) { - uint64_t current_time; uint32_t sysTime_ms32b; + _update_system_and_machine_time(); + sysTime_ms32b = RADIO_TIMER_Context.last_system_time >> 32; /* Most significant 32 bits of sysTime64 */ - current_time = HAL_RADIO_TIMER_GetCurrentSysTime(); - sysTime_ms32b = current_time >> 32; /* Most significant 32 bits of sysTime64 */ - - if (sys_time < (uint32_t)current_time) + if (sys_time < (uint32_t)RADIO_TIMER_Context.last_system_time) { /* Need to get most signicant 32 bits of current time increased by one */ sysTime_ms32b++; @@ -1129,7 +1112,7 @@ static void _get_calibration_data(CalibrationDataTypeDef *calibrationData) int32_t a2; period = LL_RADIO_TIMER_GetLSIPeriod(RADIO_CTRL); - while (period != (int32_t)LL_RADIO_TIMER_GetLSIPeriod(RADIO_CTRL) || period == 0) + while (period != LL_RADIO_TIMER_GetLSIPeriod(RADIO_CTRL) || period == 0) { period = LL_RADIO_TIMER_GetLSIPeriod(RADIO_CTRL); } @@ -1143,7 +1126,7 @@ static void _get_calibration_data(CalibrationDataTypeDef *calibrationData) mult = 0x753 ; freq = LL_RADIO_TIMER_GetLSIFrequency(RADIO_CTRL); - while (freq != (int32_t)LL_RADIO_TIMER_GetLSIFrequency(RADIO_CTRL) || freq == 0) + while (freq != LL_RADIO_TIMER_GetLSIFrequency(RADIO_CTRL) || freq == 0) { freq = LL_RADIO_TIMER_GetLSIFrequency(RADIO_CTRL); } @@ -1153,22 +1136,22 @@ static void _get_calibration_data(CalibrationDataTypeDef *calibrationData) calibrationData->freq = freq; } -static void _configureTxRxDelay(RADIO_TIMER_ContextTypeDef *context, uint8_t calculate_st) +static void _configureTxRxDelay(uint8_t calculate_st) { uint8_t tx_delay_start; tx_delay_start = (BLUEGLOB->TXDELAYSTART * 125 / 1000) + 1; - BLUEGLOB->WAKEUPINITDELAY = blue_unit_conversion(WAKEUP_INIT_DELAY, context->calibrationData.freq1, MULT64_THR_FREQ); - context->TxRxDelay.tim12_delay_mt = _us_to_machinetime(BLUEGLOB->TIMER12INITDELAYCAL); - context->TxRxDelay.tx_cal_delay = _us_to_machinetime(BLUEGLOB->TRANSMITCALDELAYCHK + tx_delay_start); - context->TxRxDelay.tx_no_cal_delay = _us_to_machinetime(BLUEGLOB->TRANSMITNOCALDELAYCHK + tx_delay_start); - context->TxRxDelay.rx_cal_delay = _us_to_machinetime(BLUEGLOB->RECEIVECALDELAYCHK); - context->TxRxDelay.rx_no_cal_delay = _us_to_machinetime(BLUEGLOB->RECEIVENOCALDELAYCHK); + BLUEGLOB->WAKEUPINITDELAY = blue_unit_conversion(WAKEUP_INIT_DELAY, RADIO_TIMER_Context.calibrationData.freq1, MULT64_THR_FREQ); + RADIO_TIMER_Context.TxRxDelay.tim12_delay_mt = _us_to_machinetime(BLUEGLOB->TIMER12INITDELAYCAL); + RADIO_TIMER_Context.TxRxDelay.tx_cal_delay = _us_to_machinetime(BLUEGLOB->TRANSMITCALDELAYCHK + tx_delay_start); + RADIO_TIMER_Context.TxRxDelay.tx_no_cal_delay = _us_to_machinetime(BLUEGLOB->TRANSMITNOCALDELAYCHK + tx_delay_start); + RADIO_TIMER_Context.TxRxDelay.rx_cal_delay = _us_to_machinetime(BLUEGLOB->RECEIVECALDELAYCHK); + RADIO_TIMER_Context.TxRxDelay.rx_no_cal_delay = _us_to_machinetime(BLUEGLOB->RECEIVENOCALDELAYCHK); if (calculate_st) { - context->TxRxDelay.tx_cal_delay_st = _us_to_systime(BLUEGLOB->TRANSMITCALDELAYCHK + tx_delay_start) + WAKEUP_INIT_DELAY; + RADIO_TIMER_Context.TxRxDelay.tx_cal_delay_st = _us_to_systime(BLUEGLOB->TRANSMITCALDELAYCHK + tx_delay_start) + WAKEUP_INIT_DELAY; } } @@ -1249,24 +1232,23 @@ static int32_t _start_timer(VTIMER_HandleType *timerHandle, uint64_t time) return expired; } -static uint64_t _get_system_time_and_machine(RADIO_TIMER_ContextTypeDef *context, uint32_t *current_machine_time) +static void _update_system_and_machine_time(void) { uint32_t difftime; uint64_t new_time; ATOMIC_SECTION_BEGIN(); - new_time = context->cumulative_time; - *current_machine_time = LL_RADIO_TIMER_GetAbsoluteTime(WAKEUP); - difftime = TIME_ABSDIFF(*current_machine_time, context->last_machine_time); - new_time += blue_unit_conversion(difftime, context->calibrationData.period1, MULT64_THR_PERIOD); - if (new_time < context->last_system_time) + new_time = RADIO_TIMER_Context.last_calib_system_time; + RADIO_TIMER_Context.last_machine_time = LL_RADIO_TIMER_GetAbsoluteTime(WAKEUP); + difftime = TIME_ABSDIFF(RADIO_TIMER_Context.last_machine_time, RADIO_TIMER_Context.last_calib_machine_time); + new_time += blue_unit_conversion(difftime, RADIO_TIMER_Context.calibrationData.period1, MULT64_THR_PERIOD); + if (new_time < RADIO_TIMER_Context.last_system_time) { - new_time += blue_unit_conversion(TIMER_MAX_VALUE, context->calibrationData.period1, MULT64_THR_PERIOD); + new_time += blue_unit_conversion(TIMER_MAX_VALUE, RADIO_TIMER_Context.calibrationData.period1, MULT64_THR_PERIOD); } - context->last_system_time = new_time; + RADIO_TIMER_Context.last_system_time = new_time; ATOMIC_SECTION_END(); - return new_time; } /* Set timeout and skip non active timers */ @@ -1281,12 +1263,12 @@ static VTIMER_HandleType *_update_user_timeout(VTIMER_HandleType *rootNode, uint if (curr->active) { ATOMIC_SECTION_BEGIN(); + _update_system_and_machine_time(); #if defined (STM32WB06) || defined (STM32WB07) - uint8_t dummy; bool share = FALSE; - _check_radio_activity(&RADIO_TIMER_Context.radioTimer, &dummy); + uint8_t dummy = _check_radio_activity(FALSE); #endif - delay = curr->expiryTime - HAL_RADIO_TIMER_GetCurrentSysTime(); + delay = curr->expiryTime - RADIO_TIMER_Context.last_system_time; if (delay > 0) { /* Protection against interrupt must be used to avoid that the called function will be interrupted @@ -1485,43 +1467,40 @@ static void _updateCalibrationData(void) RADIO_TIMER_Context.calibrationData.freq1 = updatedCalibrationData.freq1; RADIO_TIMER_Context.calibrationData.period = updatedCalibrationData.period; RADIO_TIMER_Context.calibrationData.period1 = updatedCalibrationData.period1; - _update_system_time(&RADIO_TIMER_Context); + _update_calibration_time(); ATOMIC_SECTION_END(); - _configureTxRxDelay(&RADIO_TIMER_Context, FALSE); + _configureTxRxDelay(FALSE); } else { ATOMIC_SECTION_BEGIN(); - _update_system_time(&RADIO_TIMER_Context); + _update_calibration_time(); ATOMIC_SECTION_END(); } } -/* This function update the system time after a calibration. +/* This function update the cumulative time after a calibration. * If the user calls too often this function, you could have rounding issues in the integer maths. */ -static void _update_system_time(RADIO_TIMER_ContextTypeDef *context) +static void _update_calibration_time(void) { - uint32_t current_machine_time; - uint32_t period; - - current_machine_time = LL_RADIO_TIMER_GetAbsoluteTime(WAKEUP); - period = context->calibrationData.last_period1; - context->cumulative_time = context->calibrationData.last_calibration_time + \ - blue_unit_conversion(TIME_ABSDIFF(current_machine_time, - context->last_machine_time), - period, MULT64_THR_PERIOD); + RADIO_TIMER_Context.last_machine_time = LL_RADIO_TIMER_GetAbsoluteTime(WAKEUP); + RADIO_TIMER_Context.last_calib_system_time += blue_unit_conversion(TIME_ABSDIFF(RADIO_TIMER_Context.last_machine_time, + RADIO_TIMER_Context.last_calib_machine_time), + RADIO_TIMER_Context.calibrationData.last_period1, + MULT64_THR_PERIOD); - if ((context->calibrationSettings.periodicCalibration == 0) - && (TIME_ABSDIFF(current_machine_time, - context->last_machine_time) < context->calibrationData.calibration_machine_interval)) + if ((RADIO_TIMER_Context.calibrationSettings.periodicCalibration == 0) //LSE + && (TIME_ABSDIFF(RADIO_TIMER_Context.last_machine_time, + RADIO_TIMER_Context.last_calib_machine_time) < RADIO_TIMER_Context.calibrationSettings.periodicCalibrationIntervalMTU)) { - context->cumulative_time += blue_unit_conversion(TIMER_MAX_VALUE, period, MULT64_THR_PERIOD); + RADIO_TIMER_Context.last_calib_system_time += blue_unit_conversion(TIMER_MAX_VALUE, RADIO_TIMER_Context.calibrationData.last_period1, MULT64_THR_PERIOD); } - context->last_machine_time = current_machine_time; - context->calibrationData.last_calibration_time = context->cumulative_time; - context->calibrationData.last_period1 = context->calibrationData.period1; + RADIO_TIMER_Context.last_system_time = RADIO_TIMER_Context.last_calib_system_time; + RADIO_TIMER_Context.last_calib_machine_time = RADIO_TIMER_Context.last_machine_time; + RADIO_TIMER_Context.calibrationData.nextCalibrationEvent = RADIO_TIMER_Context.last_calib_system_time + RADIO_TIMER_Context.calibrationSettings.periodicCalibrationInterval; + RADIO_TIMER_Context.calibrationData.last_period1 = RADIO_TIMER_Context.calibrationData.period1; } /* Check if it is time to program the pending radio timer (large timeouts). @@ -1532,34 +1511,33 @@ static void _update_system_time(RADIO_TIMER_ContextTypeDef *context) The check on the next calibration event is made even though the calibration is disabled (max cal. interval) in order to avoid counter wrapping with timeouts far in the future. */ -static void _check_radio_activity(RADIO_TIMER_RadioHandleTypeDef *timerHandle, uint8_t *expired) +static uint8_t _check_radio_activity(uint8_t update_sys_time) { - uint64_t nextCalibrationEvent, currentTime; - *expired = 0; - if (timerHandle->pending) + uint8_t expired = 0; + if (RADIO_TIMER_Context.radioTimer.pending) { - nextCalibrationEvent = RADIO_TIMER_Context.calibrationData.last_calibration_time + \ - RADIO_TIMER_Context.calibrationSettings.periodicCalibrationInterval; - ATOMIC_SECTION_BEGIN(); - currentTime = HAL_RADIO_TIMER_GetCurrentSysTime(); - if ((timerHandle->expiryTime < (nextCalibrationEvent + RADIO_ACTIVITY_MARGIN)) || \ - (currentTime > (nextCalibrationEvent + CALIB_SAFE_THR))) + if(update_sys_time == TRUE) + { + _update_system_and_machine_time(); + } + + if ((RADIO_TIMER_Context.radioTimer.expiryTime < (RADIO_TIMER_Context.calibrationData.nextCalibrationEvent + RADIO_ACTIVITY_MARGIN)) || \ + (RADIO_TIMER_Context.last_system_time > (RADIO_TIMER_Context.calibrationData.nextCalibrationEvent + CALIB_SAFE_THR))) { - if (timerHandle->expiryTime - TIMER1_INIT_DELAY > (currentTime + TIMER1_MARGIN)) + if (RADIO_TIMER_Context.radioTimer.expiryTime - TIMER1_INIT_DELAY > (RADIO_TIMER_Context.last_system_time + TIMER1_MARGIN)) { - *expired = TIMER_SetRadioTimerValue(timerHandle->expiryTime, timerHandle->event_type, timerHandle->cal_req); - timerHandle->pending = FALSE; /* timer has been served. No more pending */ - timerHandle->active = TRUE; /* timer has been programmed and it becomes ACTIVE */ - timerHandle->intTxRx_to_be_served = TRUE; + expired = TIMER_SetRadioTimerValue(); + RADIO_TIMER_Context.radioTimer.pending = FALSE; /* timer has been served. No more pending */ + RADIO_TIMER_Context.radioTimer.active = TRUE; /* timer has been programmed and it becomes ACTIVE */ + RADIO_TIMER_Context.radioTimer.intTxRx_to_be_served = TRUE; } else { RADIO_TIMER_Context.radioTimer.pending = FALSE; - *expired = 1; - + expired = 1; } } else @@ -1568,11 +1546,10 @@ static void _check_radio_activity(RADIO_TIMER_RadioHandleTypeDef *timerHandle, u #if defined (STM32WB06) || defined (STM32WB07) RADIO_TIMER_Context.waitCal = 1; #endif - } ATOMIC_SECTION_END(); - } + return expired; } #if defined (STM32WB06) || defined (STM32WB07) @@ -1657,15 +1634,15 @@ static void _check_host_activity(void) * @retval 0 if a correct timeout has been programmed in the timeout register * @retval 1 if a correct timeout cannot be programmed */ -static uint8_t TIMER_SetRadioTimerValue(uint32_t timeout, bool event_type, bool cal_req) +static uint8_t TIMER_SetRadioTimerValue(void) { - uint32_t current_time, delay, radio_init_delay, device_delay, rel_timeout, rel_timeout_mt; + uint32_t delay, radio_init_delay, device_delay, rel_timeout, rel_timeout_mt; uint8_t ret_val; /*choose the 2nd init duration. Check the event_type and cal. request*/ - if (event_type == TX) + if (RADIO_TIMER_Context.radioTimer.event_type == TX) { - if (cal_req) + if (RADIO_TIMER_Context.radioTimer.cal_req) { radio_init_delay = RADIO_TIMER_Context.TxRxDelay.tx_cal_delay; device_delay = RADIO_TIMER_Context.TxRxDelay.tx_cal_delay_st; @@ -1678,7 +1655,7 @@ static uint8_t TIMER_SetRadioTimerValue(uint32_t timeout, bool event_type, bool } else { - if (cal_req) + if (RADIO_TIMER_Context.radioTimer.cal_req) { radio_init_delay = RADIO_TIMER_Context.TxRxDelay.rx_cal_delay; device_delay = RADIO_TIMER_Context.TxRxDelay.tx_cal_delay_st; @@ -1691,33 +1668,34 @@ static uint8_t TIMER_SetRadioTimerValue(uint32_t timeout, bool event_type, bool } /* At this point, it is care of the upper layers to guarantee that the timeout represents an absolute time in the future */ - rel_timeout = timeout - (uint32_t)_get_system_time_and_machine(&RADIO_TIMER_Context, ¤t_time); - + rel_timeout = (uint32_t)RADIO_TIMER_Context.radioTimer.expiryTime - (uint32_t)RADIO_TIMER_Context.last_system_time; rel_timeout_mt = blue_unit_conversion(rel_timeout, RADIO_TIMER_Context.calibrationData.freq1, MULT64_THR_FREQ); /*Check if the timeout is beyond the wakeup time offset. Then program either the WakeUp timer or the Timer1*/ if (rel_timeout > (device_delay + RADIO_TIMER_Context.hs_startup_time + MARGIN_EXT)) { /*The timeout is after the wakeup_time_offset, So it is ok to program the wakeup timer*/ + delay = rel_timeout_mt - BLUEGLOB->WAKEUPINITDELAY - radio_init_delay; - LL_RADIO_TIMER_SetBLEWakeupTime(WAKEUP, ((current_time + delay) & TIMER_MAX_VALUE)); + LL_RADIO_TIMER_SetBLEWakeupTime(WAKEUP, ((RADIO_TIMER_Context.last_machine_time + delay) & TIMER_MAX_VALUE)); LL_RADIO_TIMER_SetSleepRequestMode(WAKEUP, 0); LL_RADIO_TIMER_DisableTimer1(BLUE); LL_RADIO_TIMER_DisableTimer2(BLUE); LL_RADIO_TIMER_EnableBLEWakeupTimer(WAKEUP); LL_RADIO_TIMER_EnableWakeupTimerLowPowerMode(WAKEUP); radio_init_delay += BLUEGLOB->WAKEUPINITDELAY; + } else { delay = rel_timeout_mt - RADIO_TIMER_Context.TxRxDelay.tim12_delay_mt - radio_init_delay; - LL_RADIO_TIMER_SetTimeout(BLUE, ((current_time + delay) & TIMER_MAX_VALUE)); + LL_RADIO_TIMER_SetTimeout(BLUE, ((RADIO_TIMER_Context.last_machine_time + delay) & TIMER_MAX_VALUE)); LL_RADIO_TIMER_DisableBLEWakeupTimer(WAKEUP); LL_RADIO_TIMER_EnableTimer1(BLUE); radio_init_delay += RADIO_TIMER_Context.TxRxDelay.tim12_delay_mt; } - RADIO_TIMER_Context.last_anchor_mt = (current_time + rel_timeout_mt) & TIMER_MAX_VALUE; + RADIO_TIMER_Context.last_anchor_mt = (RADIO_TIMER_Context.last_machine_time + rel_timeout_mt) & TIMER_MAX_VALUE; #if defined (STM32WB06) || defined (STM32WB07) BLUEGLOB->BYTE4 |= 1 << 7; @@ -1751,11 +1729,12 @@ static uint8_t TIMER_SetRadioTimerValue(uint32_t timeout, bool event_type, bool */ static uint64_t TIMER_GetPastSysTime(uint32_t time, uint64_t *current_system_time) { - uint32_t delta_systime, current_machine_time; - - *current_system_time = _get_system_time_and_machine(&RADIO_TIMER_Context, ¤t_machine_time); - delta_systime = blue_unit_conversion(TIME_DIFF(current_machine_time, time), RADIO_TIMER_Context.calibrationData.period1, MULT64_THR_PERIOD); - + uint32_t delta_systime; + ATOMIC_SECTION_BEGIN(); + _update_system_and_machine_time(); + *current_system_time = RADIO_TIMER_Context.last_system_time; + delta_systime = blue_unit_conversion(TIME_DIFF(RADIO_TIMER_Context.last_machine_time, time), RADIO_TIMER_Context.calibrationData.period1, MULT64_THR_PERIOD); + ATOMIC_SECTION_END(); return (*current_system_time - delta_systime); } @@ -1846,7 +1825,7 @@ void HAL_RADIO_TIMER_ERROR_IRQHandler(void) /** * @} */ -#endif /* HAL_RADIO_TIMER_MODULE_ENABLED */ + /** * @} */ diff --git a/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_timebase_tim_template.c b/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_timebase_tim_template.c index d7e3837847..e3bd89fa8a 100644 --- a/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_timebase_tim_template.c +++ b/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_timebase_tim_template.c @@ -111,6 +111,11 @@ HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) TimHandle.Init.CounterMode = TIM_COUNTERMODE_UP; if (HAL_TIM_Base_Init(&TimHandle) == HAL_OK) { +#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1U) + /* Register callback */ + HAL_TIM_RegisterCallback(&TimHandle, HAL_TIM_PERIOD_ELAPSED_CB_ID, TimeBase_TIM_PeriodElapsedCallback); +#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + /* Start the TIM time Base generation in interrupt mode */ return HAL_TIM_Base_Start_IT(&TimHandle); } diff --git a/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_uart.c b/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_uart.c index cfd0c82a48..0b595ed766 100644 --- a/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_uart.c +++ b/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_uart.c @@ -1210,7 +1210,15 @@ HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pD huart->Instance->TDR = (uint8_t)(*pdata8bits & 0xFFU); pdata8bits++; } - huart->TxXferCount--; + if ((huart->gState & HAL_UART_STATE_BUSY_TX) == HAL_UART_STATE_BUSY_TX) + { + huart->TxXferCount--; + } + else + { + /* Process was aborted during the transmission */ + return HAL_ERROR; + } } if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) @@ -1322,7 +1330,15 @@ HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, ui *pdata8bits = (uint8_t)(huart->Instance->RDR & (uint8_t)uhMask); pdata8bits++; } - huart->RxXferCount--; + if (huart->RxState == HAL_UART_STATE_BUSY_RX) + { + huart->RxXferCount--; + } + else + { + /* Process was aborted during the reception */ + return HAL_ERROR; + } } /* At end of Rx process, restore huart->RxState to Ready */ @@ -1830,10 +1846,6 @@ HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart) } #endif /* HAL_DMA_MODULE_ENABLED */ - /* Reset Tx and Rx transfer counters */ - huart->TxXferCount = 0U; - huart->RxXferCount = 0U; - /* Clear the Error flags in the ICR register */ __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); @@ -1902,9 +1914,6 @@ HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart) } #endif /* HAL_DMA_MODULE_ENABLED */ - /* Reset Tx transfer counter */ - huart->TxXferCount = 0U; - /* Flush the whole TX FIFO (if needed) */ if (huart->FifoMode == UART_FIFOMODE_ENABLE) { @@ -1969,9 +1978,6 @@ HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart) } #endif /* HAL_DMA_MODULE_ENABLED */ - /* Reset Rx transfer counter */ - huart->RxXferCount = 0U; - /* Clear the Error flags in the ICR register */ __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); @@ -2099,10 +2105,6 @@ HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart) /* if no DMA abort complete callback execution is required => call user Abort Complete callback */ if (abortcplt == 1U) { - /* Reset Tx and Rx transfer counters */ - huart->TxXferCount = 0U; - huart->RxXferCount = 0U; - /* Clear ISR function pointers */ huart->RxISR = NULL; huart->TxISR = NULL; @@ -2183,8 +2185,6 @@ HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart) } else { - /* Reset Tx transfer counter */ - huart->TxXferCount = 0U; /* Clear TxISR function pointers */ huart->TxISR = NULL; @@ -2205,9 +2205,6 @@ HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart) else #endif /* HAL_DMA_MODULE_ENABLED */ { - /* Reset Tx transfer counter */ - huart->TxXferCount = 0U; - /* Clear TxISR function pointers */ huart->TxISR = NULL; @@ -2282,9 +2279,6 @@ HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart) } else { - /* Reset Rx transfer counter */ - huart->RxXferCount = 0U; - /* Clear RxISR function pointer */ huart->pRxBuffPtr = NULL; @@ -2311,9 +2305,6 @@ HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart) else #endif /* HAL_DMA_MODULE_ENABLED */ { - /* Reset Rx transfer counter */ - huart->RxXferCount = 0U; - /* Clear RxISR function pointer */ huart->pRxBuffPtr = NULL; @@ -3725,8 +3716,6 @@ static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma) /* DMA Normal mode */ if (HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC)) { - huart->TxXferCount = 0U; - /* Disable the DMA transfer for transmit request by resetting the DMAT bit in the UART CR3 register */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); @@ -3777,8 +3766,6 @@ static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma) /* DMA Normal mode */ if (HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC)) { - huart->RxXferCount = 0U; - /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); @@ -3805,8 +3792,6 @@ static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma) If Reception till IDLE event has been selected : use Rx Event callback */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) { - huart->RxXferCount = 0; - /* Check current nb of data still to be received on DMA side. DMA Normal mode, remaining nb of data will be 0 DMA Circular mode, remaining nb of data is reset to RxXferSize */ @@ -3902,7 +3887,6 @@ static void UART_DMAError(DMA_HandleTypeDef *hdma) if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) && (gstate == HAL_UART_STATE_BUSY_TX)) { - huart->TxXferCount = 0U; UART_EndTxTransfer(huart); } @@ -3910,7 +3894,6 @@ static void UART_DMAError(DMA_HandleTypeDef *hdma) if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) && (rxstate == HAL_UART_STATE_BUSY_RX)) { - huart->RxXferCount = 0U; UART_EndRxTransfer(huart); } @@ -3934,7 +3917,6 @@ static void UART_DMAError(DMA_HandleTypeDef *hdma) static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma) { UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); - huart->RxXferCount = 0U; #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ @@ -3968,10 +3950,6 @@ static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma) } } - /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */ - huart->TxXferCount = 0U; - huart->RxXferCount = 0U; - /* Reset errorCode */ huart->ErrorCode = HAL_UART_ERROR_NONE; @@ -4023,10 +4001,6 @@ static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma) } } - /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */ - huart->TxXferCount = 0U; - huart->RxXferCount = 0U; - /* Reset errorCode */ huart->ErrorCode = HAL_UART_ERROR_NONE; @@ -4064,8 +4038,6 @@ static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma) { UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); - huart->TxXferCount = 0U; - /* Flush the whole TX FIFO (if needed) */ if (huart->FifoMode == UART_FIFOMODE_ENABLE) { @@ -4097,8 +4069,6 @@ static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma) { UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; - huart->RxXferCount = 0U; - /* Clear the Error flags in the ICR register */ __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); diff --git a/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_ll_adc.c b/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_ll_adc.c index c071750ba0..5308d29806 100644 --- a/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_ll_adc.c +++ b/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_ll_adc.c @@ -24,7 +24,7 @@ #ifdef USE_FULL_ASSERT #include "stm32_assert.h" #else -#define assert_param(expr) ((void)0U) +#define assert_param(expr) ((void)0UL) #endif /* USE_FULL_ASSERT */ /** @addtogroup STM32WB0x_LL_Driver diff --git a/system/Drivers/STM32YYxx_HAL_Driver_version.md b/system/Drivers/STM32YYxx_HAL_Driver_version.md index 54105b91d1..71c0cd92cc 100644 --- a/system/Drivers/STM32YYxx_HAL_Driver_version.md +++ b/system/Drivers/STM32YYxx_HAL_Driver_version.md @@ -20,7 +20,7 @@ * STM32U3: 1.1.0 * STM32U5: 1.6.2 * STM32WB: 1.14.6 - * STM32WB0: 1.3.0 + * STM32WB0: 1.4.0 * STM32WBA: 1.7.0 * STM32WL: 1.4.0 * STM32WL3: 1.2.0 From ff712bc31f8f171040e05f0ef76f523c5de79f68 Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Fri, 21 Nov 2025 16:18:24 +0100 Subject: [PATCH 2/5] system(wb0): update STM32WB0x CMSIS Drivers to v1.4.0 Included in STM32CubeWB0 FW v1.4.0 Signed-off-by: Frederic Pillon --- .../Device/ST/STM32WB0x/Include/stm32wb05.h | 1 + .../Device/ST/STM32WB0x/Include/stm32wb06.h | 1 + .../Device/ST/STM32WB0x/Include/stm32wb07.h | 1 + .../Device/ST/STM32WB0x/Include/stm32wb09.h | 1 + .../Device/ST/STM32WB0x/Include/stm32wb0x.h | 2 +- .../Device/ST/STM32WB0x/Release_Notes.html | 79 +++++++++++++------ .../Source/Templates/gcc/startup_stm32wb05.s | 7 +- .../Source/Templates/gcc/startup_stm32wb06.s | 7 +- .../Source/Templates/gcc/startup_stm32wb07.s | 7 +- .../Source/Templates/gcc/startup_stm32wb09.s | 7 +- .../Device/ST/STM32YYxx_CMSIS_version.md | 2 +- 11 files changed, 75 insertions(+), 40 deletions(-) diff --git a/system/Drivers/CMSIS/Device/ST/STM32WB0x/Include/stm32wb05.h b/system/Drivers/CMSIS/Device/ST/STM32WB0x/Include/stm32wb05.h index 759d715e09..fb3c430948 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32WB0x/Include/stm32wb05.h +++ b/system/Drivers/CMSIS/Device/ST/STM32WB0x/Include/stm32wb05.h @@ -75,6 +75,7 @@ typedef enum DMA_IRQn = 17, /*!< 17 DMA interrupt */ RADIO_TXRX_IRQn = 18, /*!< 18 BLE Tx/Rx interrupt */ RADIO_TIMER_ERROR_IRQn = 20, /*!< 20 RADIO TIMER Error interrupt */ + RADIO_RRM_IRQn = 22, /*!< 22 RADIO Resource Manager interrupt */ RADIO_TIMER_CPU_WKUP_IRQn = 23, /*!< 23 RADIO TIMER CPU Wakeup interrupt */ RADIO_TIMER_TXRX_WKUP_IRQn = 24, /*!< 24 RADIO TIMER Tx/Rx Wakeup interrupt */ RADIO_TXRX_SEQ_IRQn = 25, /*!< 25 BLE RX/TX sequence interrupt */ diff --git a/system/Drivers/CMSIS/Device/ST/STM32WB0x/Include/stm32wb06.h b/system/Drivers/CMSIS/Device/ST/STM32WB0x/Include/stm32wb06.h index 8a43479ce1..95bcc95436 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32WB0x/Include/stm32wb06.h +++ b/system/Drivers/CMSIS/Device/ST/STM32WB0x/Include/stm32wb06.h @@ -78,6 +78,7 @@ typedef enum DMA_IRQn = 17, /*!< 17 DMA interrupt */ RADIO_TXRX_IRQn = 18, /*!< 18 RADIO Tx/Rx interrupt */ RADIO_TIMER_ERROR_IRQn = 20, /*!< 20 RADIO TIMER Error interrupt */ + RADIO_RRM_IRQn = 22, /*!< 22 RADIO Resource Manager interrupt */ RADIO_TIMER_CPU_WKUP_IRQn = 23, /*!< 23 RADIO TIMER CPU Wakeup interrupt */ RADIO_TIMER_TXRX_WKUP_IRQn = 24, /*!< 24 RADIO TIMER Tx/Rx Wakeup interrupt */ RADIO_TXRX_SEQ_IRQn = 25 /*!< 25 RADIO Tx/Rx sequence interrupt */ diff --git a/system/Drivers/CMSIS/Device/ST/STM32WB0x/Include/stm32wb07.h b/system/Drivers/CMSIS/Device/ST/STM32WB0x/Include/stm32wb07.h index 31c2bc9774..9432008c55 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32WB0x/Include/stm32wb07.h +++ b/system/Drivers/CMSIS/Device/ST/STM32WB0x/Include/stm32wb07.h @@ -78,6 +78,7 @@ typedef enum DMA_IRQn = 17, /*!< 17 DMA interrupt */ RADIO_TXRX_IRQn = 18, /*!< 18 RADIO Tx/Rx interrupt */ RADIO_TIMER_ERROR_IRQn = 20, /*!< 20 RADIO TIMER Error interrupt */ + RADIO_RRM_IRQn = 22, /*!< 22 RADIO Resource Manager interrupt */ RADIO_TIMER_CPU_WKUP_IRQn = 23, /*!< 23 RADIO TIMER CPU Wakeup interrupt */ RADIO_TIMER_TXRX_WKUP_IRQn = 24, /*!< 24 RADIO TIMER Tx/Rx Wakeup interrupt */ RADIO_TXRX_SEQ_IRQn = 25 /*!< 25 RADIO Tx/Rx sequence interrupt */ diff --git a/system/Drivers/CMSIS/Device/ST/STM32WB0x/Include/stm32wb09.h b/system/Drivers/CMSIS/Device/ST/STM32WB0x/Include/stm32wb09.h index 97331bd047..e18e8238ab 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32WB0x/Include/stm32wb09.h +++ b/system/Drivers/CMSIS/Device/ST/STM32WB0x/Include/stm32wb09.h @@ -100,6 +100,7 @@ typedef enum DMA_IRQn = 17, /*!< 17 DMA interrupt */ RADIO_TXRX_IRQn = 18, /*!< 18 RADIO Tx/Rx interrupt */ RADIO_TIMER_ERROR_IRQn = 20, /*!< 20 RADIO TIMER Error interrupt */ + RADIO_RRM_IRQn = 22, /*!< 22 RADIO Resource Manager interrupt */ RADIO_TIMER_CPU_WKUP_IRQn = 23, /*!< 23 RADIO TIMER CPU Wakeup interrupt */ RADIO_TIMER_TXRX_WKUP_IRQn = 24, /*!< 24 RADIO TIMER Tx/Rx Wakeup interrupt */ RADIO_TXRX_SEQ_IRQn = 25, /*!< 25 RADIO Tx/Rx sequence interrupt */ diff --git a/system/Drivers/CMSIS/Device/ST/STM32WB0x/Include/stm32wb0x.h b/system/Drivers/CMSIS/Device/ST/STM32WB0x/Include/stm32wb0x.h index bf646a7985..01b9221987 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32WB0x/Include/stm32wb0x.h +++ b/system/Drivers/CMSIS/Device/ST/STM32WB0x/Include/stm32wb0x.h @@ -79,7 +79,7 @@ extern "C" { * @brief CMSIS Device version number */ #define __STM32WB0x_CMSIS_VERSION_MAIN (0x01U) /*!< [31:24] main version */ -#define __STM32WB0x_CMSIS_VERSION_SUB1 (0x03U) /*!< [23:16] sub1 version */ +#define __STM32WB0x_CMSIS_VERSION_SUB1 (0x04U) /*!< [23:16] sub1 version */ #define __STM32WB0x_CMSIS_VERSION_SUB2 (0x00U) /*!< [15:8] sub2 version */ #define __STM32WB0x_CMSIS_VERSION_RC (0x00U) /*!< [7:0] release candidate */ #define __STM32WB0x_CMSIS_DEVICE_VERSION ((__STM32WB0x_CMSIS_VERSION_MAIN << 24)\ diff --git a/system/Drivers/CMSIS/Device/ST/STM32WB0x/Release_Notes.html b/system/Drivers/CMSIS/Device/ST/STM32WB0x/Release_Notes.html index 83b768864c..a27ac5df02 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32WB0x/Release_Notes.html +++ b/system/Drivers/CMSIS/Device/ST/STM32WB0x/Release_Notes.html @@ -61,18 +61,17 @@

    Purpose

    Update history

    - - + +

    Main Changes

      -
    • None
      • +
    • Enabled the RADIO RRM interrupt handler definition.

    Contents

      -
    • Allow redefinition of the macro ‘VECT_TAB_OFFSET’ externally from -the IDE, makefile, or command line.
      • +
    • None

    Known Limitations

      @@ -89,9 +88,9 @@

      Notes

    - - + +

    Main Changes

      @@ -99,11 +98,8 @@

      Main Changes

    Contents

      -
    • Release of CMSIS devices drivers -
        -
      • Support of STM32WB05xx, STM32WB06xx, STM32WB07xx and STM32WB09xx -devices
        • -
      • +
    • Allow redefinition of the macro ‘VECT_TAB_OFFSET’ externally from +the IDE, makefile, or command line.

    Known Limitations

      @@ -120,14 +116,13 @@

      Notes

    - - + +

    Main Changes

      -
    • Fixed RAM size of WB06.
      • -
    • Remove the BP_POSTP bit of the RNG_CR from CMSIS.
      • +
    • None

    Contents

      @@ -152,17 +147,49 @@

      Notes

    - - + +

    Main Changes

    +
      +
    • Fixed RAM size of WB06.
      • +
    • Remove the BP_POSTP bit of the RNG_CR from CMSIS.
      • +
    +

    Contents

    +
      +
    • Release of CMSIS devices drivers +
        +
      • Support of STM32WB05xx, STM32WB06xx, STM32WB07xx and STM32WB09xx +devices
        • +
      • +
    +

    Known Limitations

    +
      +
    • None
      • +
    +

    Dependencies

    +
      +
    • None
      • +
    +

    Notes

    +
      +
    • None
      • +
    +
    +
    +
    + + +
    +

    Main Changes

    First Release of STM32CubeWB0 Firmware package supporting STM32WB05xx, STM32WB06xx, STM32WB07xx and STM32WB09xx devices

    -

    Contents

    +

    Contents

    • First release of CMSIS devices drivers
        @@ -170,15 +197,15 @@

        Contents

        devices
    -

    Known Limitations

    +

    Known Limitations

    • None
    -

    Dependencies

    +

    Dependencies

    • None
    -

    Notes

    +

    Notes

    • None
    diff --git a/system/Drivers/CMSIS/Device/ST/STM32WB0x/Source/Templates/gcc/startup_stm32wb05.s b/system/Drivers/CMSIS/Device/ST/STM32WB0x/Source/Templates/gcc/startup_stm32wb05.s index 1aba7b12b0..72dde0c18b 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32WB0x/Source/Templates/gcc/startup_stm32wb05.s +++ b/system/Drivers/CMSIS/Device/ST/STM32WB0x/Source/Templates/gcc/startup_stm32wb05.s @@ -107,8 +107,6 @@ LoopFillZeroBlueRam: cmp r2, r3 bcc FillZerobssram -/* Call static constructors */ - bl __libc_init_array /* Call the application's entry point.*/ bl main @@ -182,7 +180,7 @@ __vector_table: .word 0x00000000 /* IRQ19: Reserved */ .word RADIO_TIMER_ERROR_IRQHandler /* IRQ20: RADIO TIMER Error interrupt */ .word 0x00000000 /* IRQ21: Reserved */ - .word 0x00000000 /* IRQ22: Reserved */ + .word RADIO_RRM_IRQHandler /* IRQ22: RADIO RRM interrupt */ .word RADIO_TIMER_CPU_WKUP_IRQHandler /* IRQ23: RADIO TIMER CPU Wakeup interrupt */ .word RADIO_TIMER_TXRX_WKUP_IRQHandler /* IRQ24: RADIO TIMER Wakeup interrupt */ .word RADIO_TXRX_SEQ_IRQHandler /* IRQ25: RADIO Tx/Rx Sequence interrupt*/ @@ -264,6 +262,9 @@ __vector_table: .weak RADIO_TIMER_ERROR_IRQHandler .thumb_set RADIO_TIMER_ERROR_IRQHandler,Default_Handler + .weak RADIO_RRM_IRQHandler + .thumb_set RADIO_RRM_IRQHandler,Default_Handler + .weak RADIO_TIMER_CPU_WKUP_IRQHandler .thumb_set RADIO_TIMER_CPU_WKUP_IRQHandler,Default_Handler diff --git a/system/Drivers/CMSIS/Device/ST/STM32WB0x/Source/Templates/gcc/startup_stm32wb06.s b/system/Drivers/CMSIS/Device/ST/STM32WB0x/Source/Templates/gcc/startup_stm32wb06.s index 8a345492a9..a1f6d0e541 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32WB0x/Source/Templates/gcc/startup_stm32wb06.s +++ b/system/Drivers/CMSIS/Device/ST/STM32WB0x/Source/Templates/gcc/startup_stm32wb06.s @@ -107,8 +107,6 @@ LoopFillZeroBlueRam: cmp r2, r3 bcc FillZerobssram -/* Call static constructors */ - bl __libc_init_array /* Call the application's entry point.*/ bl main @@ -182,7 +180,7 @@ __vector_table: .word 0x00000000 /* IRQ19: Reserved */ .word RADIO_TIMER_ERROR_IRQHandler /* IRQ20: RADIO TIMER Error interrupt */ .word 0x00000000 /* IRQ21: Reserved */ - .word 0x00000000 /* IRQ22: Reserved */ + .word RADIO_RRM_IRQHandler /* IRQ22: RADIO RRM interrupt */ .word RADIO_TIMER_CPU_WKUP_IRQHandler /* IRQ23: RADIO TIMER CPU Wakeup interrupt */ .word RADIO_TIMER_TXRX_WKUP_IRQHandler /* IRQ24: RADIO TIMER Wakeup interrupt */ .word RADIO_TXRX_SEQ_IRQHandler /* IRQ25: RADIO Tx/Rx Sequence interrupt*/ @@ -273,6 +271,9 @@ __vector_table: .weak RADIO_TIMER_ERROR_IRQHandler .thumb_set RADIO_TIMER_ERROR_IRQHandler,Default_Handler + .weak RADIO_RRM_IRQHandler + .thumb_set RADIO_RRM_IRQHandler,Default_Handler + .weak RADIO_TIMER_CPU_WKUP_IRQHandler .thumb_set RADIO_TIMER_CPU_WKUP_IRQHandler,Default_Handler diff --git a/system/Drivers/CMSIS/Device/ST/STM32WB0x/Source/Templates/gcc/startup_stm32wb07.s b/system/Drivers/CMSIS/Device/ST/STM32WB0x/Source/Templates/gcc/startup_stm32wb07.s index 36664b5f23..da5db4d55b 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32WB0x/Source/Templates/gcc/startup_stm32wb07.s +++ b/system/Drivers/CMSIS/Device/ST/STM32WB0x/Source/Templates/gcc/startup_stm32wb07.s @@ -107,8 +107,6 @@ LoopFillZeroBlueRam: cmp r2, r3 bcc FillZerobssram -/* Call static constructors */ - bl __libc_init_array /* Call the application's entry point.*/ bl main @@ -182,7 +180,7 @@ __vector_table: .word 0x00000000 /* IRQ19: Reserved */ .word RADIO_TIMER_ERROR_IRQHandler /* IRQ20: RADIO TIMER Error interrupt */ .word 0x00000000 /* IRQ21: Reserved */ - .word 0x00000000 /* IRQ22: Reserved */ + .word RADIO_RRM_IRQHandler /* IRQ22: RADIO RRM interrupt */ .word RADIO_TIMER_CPU_WKUP_IRQHandler /* IRQ23: RADIO TIMER CPU Wakeup interrupt */ .word RADIO_TIMER_TXRX_WKUP_IRQHandler /* IRQ24: RADIO TIMER Wakeup interrupt */ .word RADIO_TXRX_SEQ_IRQHandler /* IRQ25: RADIO Tx/Rx Sequence interrupt*/ @@ -273,6 +271,9 @@ __vector_table: .weak RADIO_TIMER_ERROR_IRQHandler .thumb_set RADIO_TIMER_ERROR_IRQHandler,Default_Handler + .weak RADIO_RRM_IRQHandler + .thumb_set RADIO_RRM_IRQHandler,Default_Handler + .weak RADIO_TIMER_CPU_WKUP_IRQHandler .thumb_set RADIO_TIMER_CPU_WKUP_IRQHandler,Default_Handler diff --git a/system/Drivers/CMSIS/Device/ST/STM32WB0x/Source/Templates/gcc/startup_stm32wb09.s b/system/Drivers/CMSIS/Device/ST/STM32WB0x/Source/Templates/gcc/startup_stm32wb09.s index 2ee46de754..dd2fcd06bd 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32WB0x/Source/Templates/gcc/startup_stm32wb09.s +++ b/system/Drivers/CMSIS/Device/ST/STM32WB0x/Source/Templates/gcc/startup_stm32wb09.s @@ -107,8 +107,6 @@ LoopFillZeroBlueRam: cmp r2, r3 bcc FillZerobssram -/* Call static constructors */ - bl __libc_init_array /* Call the application's entry point.*/ bl main @@ -182,7 +180,7 @@ __vector_table: .word 0x00000000 /* IRQ19: Reserved */ .word RADIO_TIMER_ERROR_IRQHandler /* IRQ20: RADIO TIMER Error interrupt */ .word 0x00000000 /* IRQ21: Reserved */ - .word 0x00000000 /* IRQ22: Reserved */ + .word RADIO_RRM_IRQHandler /* IRQ22: RADIO RRM interrupt */ .word RADIO_TIMER_CPU_WKUP_IRQHandler /* IRQ23: RADIO TIMER CPU Wakeup interrupt */ .word RADIO_TIMER_TXRX_WKUP_IRQHandler /* IRQ24: RADIO TIMER Wakeup interrupt */ .word RADIO_TXRX_SEQ_IRQHandler /* IRQ25: RADIO Tx/Rx Sequence interrupt*/ @@ -264,6 +262,9 @@ __vector_table: .weak RADIO_TIMER_ERROR_IRQHandler .thumb_set RADIO_TIMER_ERROR_IRQHandler,Default_Handler + .weak RADIO_RRM_IRQHandler + .thumb_set RADIO_RRM_IRQHandler,Default_Handler + .weak RADIO_TIMER_CPU_WKUP_IRQHandler .thumb_set RADIO_TIMER_CPU_WKUP_IRQHandler,Default_Handler diff --git a/system/Drivers/CMSIS/Device/ST/STM32YYxx_CMSIS_version.md b/system/Drivers/CMSIS/Device/ST/STM32YYxx_CMSIS_version.md index d62067ee10..eb3e7f27b1 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32YYxx_CMSIS_version.md +++ b/system/Drivers/CMSIS/Device/ST/STM32YYxx_CMSIS_version.md @@ -20,7 +20,7 @@ * STM32U3: 1.1.0 * STM32U5: 1.4.2 * STM32WB: 1.12.3 - * STM32WB0: 1.3.0 + * STM32WB0: 1.4.0 * STM32WBA: 1.7.0 * STM32WL: 1.3.0 * STM32WL3: 1.2.0 From 815a2f9290eb7582351fc03808f14271c2e35d3f Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Sat, 14 Jun 2025 09:59:56 +0200 Subject: [PATCH 3/5] fix(wb0): HAL and LL warnings Signed-off-by: Frederic Pillon --- .../Inc/stm32wb0x_ll_dma.h | 40 +++++++++++++++++++ .../Inc/stm32wb0x_ll_radio_timer.h | 3 ++ .../Src/stm32wb0x_hal_flash_ex.c | 2 +- .../Src/stm32wb0x_hal_radio_timer.c | 4 +- .../Src/stm32wb0x_ll_adc.c | 2 +- 5 files changed, 47 insertions(+), 4 deletions(-) diff --git a/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_ll_dma.h b/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_ll_dma.h index bc237ac451..fff12f8c30 100644 --- a/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_ll_dma.h +++ b/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_ll_dma.h @@ -430,6 +430,7 @@ typedef struct */ __STATIC_INLINE void LL_DMA_EnableChannel(DMA_TypeDef *DMAx, uint32_t Channel) { + (void)DMAx; SET_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_EN); } @@ -450,6 +451,7 @@ __STATIC_INLINE void LL_DMA_EnableChannel(DMA_TypeDef *DMAx, uint32_t Channel) */ __STATIC_INLINE void LL_DMA_DisableChannel(DMA_TypeDef *DMAx, uint32_t Channel) { + (void)DMAx; CLEAR_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_EN); } @@ -470,6 +472,7 @@ __STATIC_INLINE void LL_DMA_DisableChannel(DMA_TypeDef *DMAx, uint32_t Channel) */ __STATIC_INLINE uint32_t LL_DMA_IsEnabledChannel(DMA_TypeDef *DMAx, uint32_t Channel) { + (void)DMAx; return ((READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_EN) == (DMA_CCR_EN)) ? 1UL : 0UL); } @@ -506,6 +509,7 @@ __STATIC_INLINE uint32_t LL_DMA_IsEnabledChannel(DMA_TypeDef *DMAx, uint32_t Cha */ __STATIC_INLINE void LL_DMA_ConfigTransfer(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Configuration) { + (void)DMAx; MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_DIR | DMA_CCR_MEM2MEM | DMA_CCR_CIRC | DMA_CCR_PINC | DMA_CCR_MINC | DMA_CCR_PSIZE | DMA_CCR_MSIZE | DMA_CCR_PL, Configuration); @@ -533,6 +537,7 @@ __STATIC_INLINE void LL_DMA_ConfigTransfer(DMA_TypeDef *DMAx, uint32_t Channel, */ __STATIC_INLINE void LL_DMA_SetDataTransferDirection(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Direction) { + (void)DMAx; MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_DIR | DMA_CCR_MEM2MEM, Direction); } @@ -558,6 +563,7 @@ __STATIC_INLINE void LL_DMA_SetDataTransferDirection(DMA_TypeDef *DMAx, uint32_t */ __STATIC_INLINE uint32_t LL_DMA_GetDataTransferDirection(DMA_TypeDef *DMAx, uint32_t Channel) { + (void)DMAx; return (READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_DIR | DMA_CCR_MEM2MEM)); } @@ -584,6 +590,7 @@ __STATIC_INLINE uint32_t LL_DMA_GetDataTransferDirection(DMA_TypeDef *DMAx, uint */ __STATIC_INLINE void LL_DMA_SetMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Mode) { + (void)DMAx; MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_CIRC, Mode); } @@ -607,6 +614,7 @@ __STATIC_INLINE void LL_DMA_SetMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_ */ __STATIC_INLINE uint32_t LL_DMA_GetMode(DMA_TypeDef *DMAx, uint32_t Channel) { + (void)DMAx; return (READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_CIRC)); } @@ -631,6 +639,7 @@ __STATIC_INLINE uint32_t LL_DMA_GetMode(DMA_TypeDef *DMAx, uint32_t Channel) */ __STATIC_INLINE void LL_DMA_SetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphOrM2MSrcIncMode) { + (void)DMAx; MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_PINC, PeriphOrM2MSrcIncMode); } @@ -654,6 +663,7 @@ __STATIC_INLINE void LL_DMA_SetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Channel */ __STATIC_INLINE uint32_t LL_DMA_GetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Channel) { + (void)DMAx; return (READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_PINC)); } @@ -678,6 +688,7 @@ __STATIC_INLINE uint32_t LL_DMA_GetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Cha */ __STATIC_INLINE void LL_DMA_SetMemoryIncMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryOrM2MDstIncMode) { + (void)DMAx; MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_MINC, MemoryOrM2MDstIncMode); } @@ -701,6 +712,7 @@ __STATIC_INLINE void LL_DMA_SetMemoryIncMode(DMA_TypeDef *DMAx, uint32_t Channel */ __STATIC_INLINE uint32_t LL_DMA_GetMemoryIncMode(DMA_TypeDef *DMAx, uint32_t Channel) { + (void)DMAx; return (READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_MINC)); } @@ -726,6 +738,7 @@ __STATIC_INLINE uint32_t LL_DMA_GetMemoryIncMode(DMA_TypeDef *DMAx, uint32_t Cha */ __STATIC_INLINE void LL_DMA_SetPeriphSize(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphOrM2MSrcDataSize) { + (void)DMAx; MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_PSIZE, PeriphOrM2MSrcDataSize); } @@ -750,6 +763,7 @@ __STATIC_INLINE void LL_DMA_SetPeriphSize(DMA_TypeDef *DMAx, uint32_t Channel, u */ __STATIC_INLINE uint32_t LL_DMA_GetPeriphSize(DMA_TypeDef *DMAx, uint32_t Channel) { + (void)DMAx; return (READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_PSIZE)); } @@ -775,6 +789,7 @@ __STATIC_INLINE uint32_t LL_DMA_GetPeriphSize(DMA_TypeDef *DMAx, uint32_t Channe */ __STATIC_INLINE void LL_DMA_SetMemorySize(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryOrM2MDstDataSize) { + (void)DMAx; MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_MSIZE, MemoryOrM2MDstDataSize); } @@ -799,6 +814,7 @@ __STATIC_INLINE void LL_DMA_SetMemorySize(DMA_TypeDef *DMAx, uint32_t Channel, u */ __STATIC_INLINE uint32_t LL_DMA_GetMemorySize(DMA_TypeDef *DMAx, uint32_t Channel) { + (void)DMAx; return (READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_MSIZE)); } @@ -825,6 +841,7 @@ __STATIC_INLINE uint32_t LL_DMA_GetMemorySize(DMA_TypeDef *DMAx, uint32_t Channe */ __STATIC_INLINE void LL_DMA_SetChannelPriorityLevel(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Priority) { + (void)DMAx; MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_PL, Priority); } @@ -850,6 +867,7 @@ __STATIC_INLINE void LL_DMA_SetChannelPriorityLevel(DMA_TypeDef *DMAx, uint32_t */ __STATIC_INLINE uint32_t LL_DMA_GetChannelPriorityLevel(DMA_TypeDef *DMAx, uint32_t Channel) { + (void)DMAx; return (READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_PL)); } @@ -874,6 +892,7 @@ __STATIC_INLINE uint32_t LL_DMA_GetChannelPriorityLevel(DMA_TypeDef *DMAx, uint3 */ __STATIC_INLINE void LL_DMA_SetDataLength(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t NbData) { + (void)DMAx; MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CNDTR, DMA_CNDTR_NDT, NbData); } @@ -897,6 +916,7 @@ __STATIC_INLINE void LL_DMA_SetDataLength(DMA_TypeDef *DMAx, uint32_t Channel, u */ __STATIC_INLINE uint32_t LL_DMA_GetDataLength(DMA_TypeDef *DMAx, uint32_t Channel) { + (void)DMAx; return (READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CNDTR, DMA_CNDTR_NDT)); } @@ -928,6 +948,7 @@ __STATIC_INLINE uint32_t LL_DMA_GetDataLength(DMA_TypeDef *DMAx, uint32_t Channe __STATIC_INLINE void LL_DMA_ConfigAddresses(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t SrcAddress, uint32_t DstAddress, uint32_t Direction) { + (void)DMAx; /* Direction Memory to Periph */ if (Direction == LL_DMA_DIRECTION_MEMORY_TO_PERIPH) { @@ -962,6 +983,7 @@ __STATIC_INLINE void LL_DMA_ConfigAddresses(DMA_TypeDef *DMAx, uint32_t Channel, */ __STATIC_INLINE void LL_DMA_SetMemoryAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAddress) { + (void)DMAx; WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR, MemoryAddress); } @@ -985,6 +1007,7 @@ __STATIC_INLINE void LL_DMA_SetMemoryAddress(DMA_TypeDef *DMAx, uint32_t Channel */ __STATIC_INLINE void LL_DMA_SetPeriphAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphAddress) { + (void)DMAx; WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CPAR, PeriphAddress); } @@ -1006,6 +1029,7 @@ __STATIC_INLINE void LL_DMA_SetPeriphAddress(DMA_TypeDef *DMAx, uint32_t Channel */ __STATIC_INLINE uint32_t LL_DMA_GetMemoryAddress(DMA_TypeDef *DMAx, uint32_t Channel) { + (void)DMAx; return (READ_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR)); } @@ -1027,6 +1051,7 @@ __STATIC_INLINE uint32_t LL_DMA_GetMemoryAddress(DMA_TypeDef *DMAx, uint32_t Cha */ __STATIC_INLINE uint32_t LL_DMA_GetPeriphAddress(DMA_TypeDef *DMAx, uint32_t Channel) { + (void)DMAx; return (READ_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CPAR)); } @@ -1050,6 +1075,7 @@ __STATIC_INLINE uint32_t LL_DMA_GetPeriphAddress(DMA_TypeDef *DMAx, uint32_t Cha */ __STATIC_INLINE void LL_DMA_SetM2MSrcAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAddress) { + (void)DMAx; WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CPAR, MemoryAddress); } @@ -1073,6 +1099,7 @@ __STATIC_INLINE void LL_DMA_SetM2MSrcAddress(DMA_TypeDef *DMAx, uint32_t Channel */ __STATIC_INLINE void LL_DMA_SetM2MDstAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAddress) { + (void)DMAx; WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR, MemoryAddress); } @@ -1094,6 +1121,7 @@ __STATIC_INLINE void LL_DMA_SetM2MDstAddress(DMA_TypeDef *DMAx, uint32_t Channel */ __STATIC_INLINE uint32_t LL_DMA_GetM2MSrcAddress(DMA_TypeDef *DMAx, uint32_t Channel) { + (void)DMAx; return (READ_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CPAR)); } @@ -1115,6 +1143,7 @@ __STATIC_INLINE uint32_t LL_DMA_GetM2MSrcAddress(DMA_TypeDef *DMAx, uint32_t Cha */ __STATIC_INLINE uint32_t LL_DMA_GetM2MDstAddress(DMA_TypeDef *DMAx, uint32_t Channel) { + (void)DMAx; return (READ_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR)); } @@ -1137,6 +1166,7 @@ __STATIC_INLINE uint32_t LL_DMA_GetM2MDstAddress(DMA_TypeDef *DMAx, uint32_t Cha */ __STATIC_INLINE void LL_DMA_SetPeriphRequest(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Request) { + (void)DMAx; MODIFY_REG(__LL_DMA_INSTANCE_TO_DMAMUX_CCR(DMAx, Channel - 1U)->CxCR, DMAMUX_CxCR_DMAREQ_ID, Request); } @@ -1158,6 +1188,7 @@ __STATIC_INLINE void LL_DMA_SetPeriphRequest(DMA_TypeDef *DMAx, uint32_t Channel */ __STATIC_INLINE uint32_t LL_DMA_GetPeriphRequest(DMA_TypeDef *DMAx, uint32_t Channel) { + (void)DMAx; return (READ_BIT(__LL_DMA_INSTANCE_TO_DMAMUX_CCR(DMAx, Channel - 1U)->CxCR, DMAMUX_CxCR_DMAREQ_ID)); } @@ -1897,6 +1928,7 @@ __STATIC_INLINE void LL_DMA_ClearFlag_TE8(DMA_TypeDef *DMAx) */ __STATIC_INLINE void LL_DMA_EnableIT_TC(DMA_TypeDef *DMAx, uint32_t Channel) { + (void)DMAx; SET_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_TCIE); } @@ -1917,6 +1949,7 @@ __STATIC_INLINE void LL_DMA_EnableIT_TC(DMA_TypeDef *DMAx, uint32_t Channel) */ __STATIC_INLINE void LL_DMA_EnableIT_HT(DMA_TypeDef *DMAx, uint32_t Channel) { + (void)DMAx; SET_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_HTIE); } @@ -1937,6 +1970,7 @@ __STATIC_INLINE void LL_DMA_EnableIT_HT(DMA_TypeDef *DMAx, uint32_t Channel) */ __STATIC_INLINE void LL_DMA_EnableIT_TE(DMA_TypeDef *DMAx, uint32_t Channel) { + (void)DMAx; SET_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_TEIE); } @@ -1957,6 +1991,7 @@ __STATIC_INLINE void LL_DMA_EnableIT_TE(DMA_TypeDef *DMAx, uint32_t Channel) */ __STATIC_INLINE void LL_DMA_DisableIT_TC(DMA_TypeDef *DMAx, uint32_t Channel) { + (void)DMAx; CLEAR_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_TCIE); } @@ -1977,6 +2012,7 @@ __STATIC_INLINE void LL_DMA_DisableIT_TC(DMA_TypeDef *DMAx, uint32_t Channel) */ __STATIC_INLINE void LL_DMA_DisableIT_HT(DMA_TypeDef *DMAx, uint32_t Channel) { + (void)DMAx; CLEAR_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_HTIE); } @@ -1997,6 +2033,7 @@ __STATIC_INLINE void LL_DMA_DisableIT_HT(DMA_TypeDef *DMAx, uint32_t Channel) */ __STATIC_INLINE void LL_DMA_DisableIT_TE(DMA_TypeDef *DMAx, uint32_t Channel) { + (void)DMAx; CLEAR_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_TEIE); } @@ -2017,6 +2054,7 @@ __STATIC_INLINE void LL_DMA_DisableIT_TE(DMA_TypeDef *DMAx, uint32_t Channel) */ __STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_TC(DMA_TypeDef *DMAx, uint32_t Channel) { + (void)DMAx; return ((READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_TCIE) == (DMA_CCR_TCIE)) ? 1UL : 0UL); } @@ -2038,6 +2076,7 @@ __STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_TC(DMA_TypeDef *DMAx, uint32_t Chann */ __STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_HT(DMA_TypeDef *DMAx, uint32_t Channel) { + (void)DMAx; return ((READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_HTIE) == (DMA_CCR_HTIE)) ? 1UL : 0UL); } @@ -2059,6 +2098,7 @@ __STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_HT(DMA_TypeDef *DMAx, uint32_t Chann */ __STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_TE(DMA_TypeDef *DMAx, uint32_t Channel) { + (void)DMAx; return ((READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_TEIE) == (DMA_CCR_TEIE)) ? 1UL : 0UL); } diff --git a/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_ll_radio_timer.h b/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_ll_radio_timer.h index e3618cfc1d..db5808c58d 100644 --- a/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_ll_radio_timer.h +++ b/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_ll_radio_timer.h @@ -445,6 +445,8 @@ __STATIC_INLINE uint32_t LL_RADIO_TIMER_IsEnabledCPUWakeupTimerForceSleeping(WAK __STATIC_INLINE void LL_RADIO_TIMER_SetSleepRequestMode(WAKEUP_TypeDef *WAKEUPx, uint8_t mode) { #if defined(STM32WB09) + (void)WAKEUPx; // No operation for STM32WB09 + (void)mode; // No operation for STM32WB09 return; #else MODIFY_REG_FIELD(WAKEUP->BLUE_SLEEP_REQUEST_MODE, WAKEUP_BLUE_SLEEP_REQUEST_MODE_SLEEP_REQ_MODE, (mode & 0x7)); @@ -460,6 +462,7 @@ __STATIC_INLINE void LL_RADIO_TIMER_SetSleepRequestMode(WAKEUP_TypeDef *WAKEUPx, __STATIC_INLINE uint32_t LL_RADIO_TIMER_GetSleepRequestMode(WAKEUP_TypeDef *WAKEUPx) { #if defined(STM32WB09) + (void)WAKEUPx; // No operation for STM32WB09 return 0; #else return (uint32_t)(READ_REG(WAKEUP->BLUE_SLEEP_REQUEST_MODE) & WAKEUP_BLUE_SLEEP_REQUEST_MODE_SLEEP_REQ_MODE); diff --git a/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_flash_ex.c b/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_flash_ex.c index fe66a0a89e..6bded19a19 100644 --- a/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_flash_ex.c +++ b/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_flash_ex.c @@ -109,7 +109,7 @@ static void FLASH_KeyWrite(void); */ HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError) { - HAL_StatusTypeDef status; + HAL_StatusTypeDef status = HAL_ERROR; uint32_t index; /* Check the parameters */ diff --git a/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_radio_timer.c b/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_radio_timer.c index f34bbafecb..5117525b98 100644 --- a/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_radio_timer.c +++ b/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_radio_timer.c @@ -1112,7 +1112,7 @@ static void _get_calibration_data(CalibrationDataTypeDef *calibrationData) int32_t a2; period = LL_RADIO_TIMER_GetLSIPeriod(RADIO_CTRL); - while (period != LL_RADIO_TIMER_GetLSIPeriod(RADIO_CTRL) || period == 0) + while (period != (int32_t)LL_RADIO_TIMER_GetLSIPeriod(RADIO_CTRL) || period == 0) { period = LL_RADIO_TIMER_GetLSIPeriod(RADIO_CTRL); } @@ -1126,7 +1126,7 @@ static void _get_calibration_data(CalibrationDataTypeDef *calibrationData) mult = 0x753 ; freq = LL_RADIO_TIMER_GetLSIFrequency(RADIO_CTRL); - while (freq != LL_RADIO_TIMER_GetLSIFrequency(RADIO_CTRL) || freq == 0) + while (freq != (int32_t)LL_RADIO_TIMER_GetLSIFrequency(RADIO_CTRL) || freq == 0) { freq = LL_RADIO_TIMER_GetLSIFrequency(RADIO_CTRL); } diff --git a/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_ll_adc.c b/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_ll_adc.c index 5308d29806..c071750ba0 100644 --- a/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_ll_adc.c +++ b/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_ll_adc.c @@ -24,7 +24,7 @@ #ifdef USE_FULL_ASSERT #include "stm32_assert.h" #else -#define assert_param(expr) ((void)0UL) +#define assert_param(expr) ((void)0U) #endif /* USE_FULL_ASSERT */ /** @addtogroup STM32WB0x_LL_Driver From b7ce938e2c58e44d46aea7de6cb46721d1b18ad2 Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Sat, 14 Jun 2025 14:46:20 +0200 Subject: [PATCH 4/5] fix(wb0): HAL radio module guards Signed-off-by: Frederic Pillon --- system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_radio.c | 3 ++- .../STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_radio_timer.c | 4 ++-- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_radio.c b/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_radio.c index f0374b4d55..c9ce7292d5 100644 --- a/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_radio.c +++ b/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_radio.c @@ -22,6 +22,7 @@ /** @addtogroup STM32WB0x_HAL_Driver * @{ */ +#ifdef HAL_RADIO_MODULE_ENABLED /** @addtogroup RADIO * @{ @@ -1802,7 +1803,7 @@ void HAL_RADIO_TXRX_SEQ_IRQHandler(void) /** * @} */ - +#endif /* HAL_RADIO_MODULE_ENABLED */ /** * @} */ diff --git a/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_radio_timer.c b/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_radio_timer.c index 5117525b98..37e2f5a53d 100644 --- a/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_radio_timer.c +++ b/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_radio_timer.c @@ -56,7 +56,7 @@ /** @addtogroup STM32WB0x_HAL_Driver * @{ */ - +#ifdef HAL_RADIO_TIMER_MODULE_ENABLED /** @addtogroup RADIO_TIMER * @brief HAL RADIO TIMER module driver * @{ @@ -1825,7 +1825,7 @@ void HAL_RADIO_TIMER_ERROR_IRQHandler(void) /** * @} */ - +#endif /* HAL_RADIO_TIMER_MODULE_ENABLED */ /** * @} */ From 27f975a4a6fa9dd0ce27f9aab473494a83cc7ef8 Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Mon, 16 Jun 2025 14:22:51 +0200 Subject: [PATCH 5/5] feat(wb0): add __libc_init_array call to startup Signed-off-by: Frederic Pillon --- .../ST/STM32WB0x/Source/Templates/gcc/startup_stm32wb05.s | 2 ++ .../ST/STM32WB0x/Source/Templates/gcc/startup_stm32wb06.s | 2 ++ .../ST/STM32WB0x/Source/Templates/gcc/startup_stm32wb07.s | 2 ++ .../ST/STM32WB0x/Source/Templates/gcc/startup_stm32wb09.s | 2 ++ 4 files changed, 8 insertions(+) diff --git a/system/Drivers/CMSIS/Device/ST/STM32WB0x/Source/Templates/gcc/startup_stm32wb05.s b/system/Drivers/CMSIS/Device/ST/STM32WB0x/Source/Templates/gcc/startup_stm32wb05.s index 72dde0c18b..7198d61a24 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32WB0x/Source/Templates/gcc/startup_stm32wb05.s +++ b/system/Drivers/CMSIS/Device/ST/STM32WB0x/Source/Templates/gcc/startup_stm32wb05.s @@ -107,6 +107,8 @@ LoopFillZeroBlueRam: cmp r2, r3 bcc FillZerobssram +/* Call static constructors */ + bl __libc_init_array /* Call the application's entry point.*/ bl main diff --git a/system/Drivers/CMSIS/Device/ST/STM32WB0x/Source/Templates/gcc/startup_stm32wb06.s b/system/Drivers/CMSIS/Device/ST/STM32WB0x/Source/Templates/gcc/startup_stm32wb06.s index a1f6d0e541..d35491dc71 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32WB0x/Source/Templates/gcc/startup_stm32wb06.s +++ b/system/Drivers/CMSIS/Device/ST/STM32WB0x/Source/Templates/gcc/startup_stm32wb06.s @@ -107,6 +107,8 @@ LoopFillZeroBlueRam: cmp r2, r3 bcc FillZerobssram +/* Call static constructors */ + bl __libc_init_array /* Call the application's entry point.*/ bl main diff --git a/system/Drivers/CMSIS/Device/ST/STM32WB0x/Source/Templates/gcc/startup_stm32wb07.s b/system/Drivers/CMSIS/Device/ST/STM32WB0x/Source/Templates/gcc/startup_stm32wb07.s index da5db4d55b..f215b1c9b1 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32WB0x/Source/Templates/gcc/startup_stm32wb07.s +++ b/system/Drivers/CMSIS/Device/ST/STM32WB0x/Source/Templates/gcc/startup_stm32wb07.s @@ -107,6 +107,8 @@ LoopFillZeroBlueRam: cmp r2, r3 bcc FillZerobssram +/* Call static constructors */ + bl __libc_init_array /* Call the application's entry point.*/ bl main diff --git a/system/Drivers/CMSIS/Device/ST/STM32WB0x/Source/Templates/gcc/startup_stm32wb09.s b/system/Drivers/CMSIS/Device/ST/STM32WB0x/Source/Templates/gcc/startup_stm32wb09.s index dd2fcd06bd..b5e51491e0 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32WB0x/Source/Templates/gcc/startup_stm32wb09.s +++ b/system/Drivers/CMSIS/Device/ST/STM32WB0x/Source/Templates/gcc/startup_stm32wb09.s @@ -107,6 +107,8 @@ LoopFillZeroBlueRam: cmp r2, r3 bcc FillZerobssram +/* Call static constructors */ + bl __libc_init_array /* Call the application's entry point.*/ bl main