Open software, WS/WSC/PCv2 compatible flash cartridge.
- OSS CAD Suite (FPGA core)
- Requires a modified version of
icepack, see below for more information
- Requires a modified version of
- Wonderful Toolchain
target-wswan(IPL1, recovery, updater)toolchain-gcc-arm-none-eabi(MCU firmware)wf-superfamiconv(IPL1)wf-zx0-salvador(IPL1, updater)
- CMake (MCU firmware)
- NASM (IPL0)
- Nim 2.0+ (FPGA core, IPL0)
- Ninja (MCU firmware)
- Python 3.x (SPI images, updater)
- Including external libraries:
crc
- Including external libraries:
- dd, dosfstools, mtools (emulator images)
For the FPGA to be ready in time, the bitstream needs to be loaded at the highest speed possible. I created a PR for icepack which adds a setting to change this. Without it, it is not possible to compile the FPGA bitstream.
- Make sure to fetch the Git submodules:
git submodule update --init --recursive. - Run
make helpto read what build options are possible. - Run
make(ormake ...) to build the requested components.
docs/: CC BY-SA 4.0 (user and developer documentation)firmware/: GNU GPLv3+ (MCU firmware)software/: GNU GPLv3+ (cartridge IPL and on-device tools)software/libnile/: zlib AND FatFs license