Skip to content

Conversation

@robtaylor
Copy link
Contributor

Summary

  • Add open_uart_log() and close_uart_log() functions in models.cc/h
  • Write UART output to uart.log at project root during simulation
  • Flush after each character for real-time file watching

Purpose

This enables the ChipFlow VS Code extension's UART Console panel to display simulation output in real-time by watching the log file.

Changes

  • chipflow/common/sim/models.cc: Add uart_log file handle and open/close functions, write characters to file
  • chipflow/common/sim/models.h: Export the new functions
  • chipflow/common/sim/main.cc.jinja: Call open_uart_log/close_uart_log

Test plan

  • Build simulation
  • Run simulation and verify uart.log is created with UART output

🤖 Generated with Claude Code

Add open_uart_log() and close_uart_log() functions to write UART
output to a dedicated file at PROJECT_ROOT/uart.log. The file is
flushed after each character for real-time monitoring by the
ChipFlow VS Code extension.

This enables the extension's UART Console panel to display
simulation output in real-time by watching the log file.

🤖 Generated with [Claude Code](https://claude.com/claude-code)

Co-Authored-By: Claude Opus 4.5 <noreply@anthropic.com>
@github-actions
Copy link

github-actions bot commented Dec 18, 2025

PR Preview Action v1.6.3
Preview removed because the pull request was closed.
2025-12-18 23:58 UTC

@github-actions
Copy link

Tests Skipped Failures Errors Time
68 4 💤 0 ❌ 0 🔥 25.019s ⏱️

@robtaylor robtaylor merged commit 11746b1 into main Dec 18, 2025
6 checks passed
@robtaylor robtaylor deleted the feat/uart-log-file branch December 18, 2025 23:56
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

2 participants