Listen to the talk: PyRTLSweeper: Automated Transformation of Digital Circuits to Minesweeper Boards
Also check out the paper and the poster.
PyRTLSweeper is a Python package that takes a stateless circuit written with PyRTL and produces a Minesweeper board readable by JSMinesweeper that represents the circuit. The player can designate input cells to be flagged or not flagged, and some output cells are determined to have a mine or not.
The following circuit:
a = pyrtl.Input(bitwidth=1, name="a")
b = pyrtl.Input(bitwidth=1, name="b")
c = pyrtl.Output(bitwidth=1, name="c")
# OR gate
c <<= a | bproduces this Minesweeper board:
The inputs are the two wires at the top center, and the output is the wire at the center.
There is another example circuit in examples/circuit.py which you can test for yourself.
To get started with PyRTLSweeper, try editing and running the example with uv:
uv run ./examples/circuit.pyThis will create a file called circuit.mine.
Now open JSMinesweeper, click Switch to Analyser at the top left, and drag circuit.mine into the window. Then give it a couple seconds and you should see the Minesweeper board representing the circuit.
The two wires at the top center are the inputs. Right click to place flags on them, and click Analyse to see the outputs in the two wires at the center. A flag on the left side of a hidden cell pair is 0, and a flag on the right side is 1.
Try editing the example and re-running it to see what happens! Just don't make it too big or your browser will not like you.
Note
PyRTLSweeper currently does not support registers and memories due to the complexity of state preservation.