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Hi, while implementing the BigPulse LD driver i noticed few misfunctions. This pull request contains 3 traced and resolved issues.

  • DONE: U3 ADP7142: Pins 1,2,3 ought to be connected. missing net connection in PCB.
correction_02_adp7142
  • DONE: Q1 FMMT415TD, the maximal allowed collector-emitor voltage is VceMAX = 100 V, To limit VDC+ voltage to max 100 V, 15k R27 was added. To allow VDC+ up to 200 V, different darlington transistor should be used (it seems there is no sot-23 option). Still R27 of lower value should be used to limit VDC+ voltage.
correction_03_r27_fbk
  • DONE: LD1 SPL_P90 has swaped Anode-Cathode pinout compared to regular 5mm LED package, added "A" + "C" marks to the front PCB silkstreen.
correction_01_ld

…t VDC to 100 V (FMMT415TD VceMAX=100 V); Updated F silkscreen: LD1 SPL_P90 has swaped A+K pinout compared to regular 5mm LED package
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