Skip to content
View WajahatRiaz's full-sized avatar
🎯
Small aim is a crime! - Dr. APJ Abdul Kalam
🎯
Small aim is a crime! - Dr. APJ Abdul Kalam

Block or report WajahatRiaz

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Maximum 250 characters. Please don't include any personal information such as legal names or email addresses. Markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse
WajahatRiaz/README.md

Hi! My name is Wajahat Riaz

🧩 Senior Emulation Engineer at 10xEngineers | πŸŽ“ PhD Scholar at LUMS | πŸ† Semiconductor Industry Fellowship Alumnus

  • πŸ‘‹ Currently working as a Senior Emulation Engineer at 10xEngineers, I specialize in developing advanced verification and emulation methodologies for complex multicore systems.
  • πŸ‘€ I architect and optimize emulation frameworks to ensure functional correctness, performance compliance, and overall design reliability. I’m passionate about delivering scalable, efficient solutions that support high-performance, next-generation semiconductor technologies.
  • 🌱 I have a strong work ethic and thrive both in collaborative team environments and when working independently.
  • πŸ“« You can reach me via email: wajahatriazmirza@gmail.com
  • πŸ‘€ My interests include Computer Architecture, VLSI for AI, Accelerators and Compilers, FPGAs, and Neuromorphic Hardware.

ORCID profile

Pinned Loading

  1. HandwrittenUrduCharacterRecognition HandwrittenUrduCharacterRecognition Public

    Handwritten Urdu Character Recognition in Machine Learning using Scikit-learn

    Python 2 2

  2. SingleLabelTextClassification SingleLabelTextClassification Public

    Text Classification techniques are necessary to find relevant information in many different tasks that deal with large quantities of information in text form.

    Python

  3. Tutorial_at_HPCA-29 Tutorial_at_HPCA-29 Public

    Forked from rsnikhil/Tutorial_at_HPCA-29

    An AWS-FPGA Testbed for Architecture Research on RISC-V CPUs, Accelerators, and Memory Systems

    Verilog