Skip to content

Conversation

@lucasssvaz
Copy link
Member

@lucasssvaz lucasssvaz commented Dec 8, 2025

Description of Change

This pull request updates the configuration for the ESP32-P4 board to explicitly specify the ChipVariant=postv3 option in all build scripts, documentation, and CI configuration files. This ensures that builds for ESP32-P4 target the correct chip variant and are consistent across the project.

Build and configuration updates:

  • Updated the ESP32-P4 build options in .github/scripts/sketch_utils.sh to include ChipVariant=postv3, ensuring the correct chip variant is set during sketch builds.

Documentation updates:

  • Modified the list of default FQBNs in docs/en/contributing.rst to show ChipVariant=postv3 for ESP32-P4, reflecting the new standard configuration.

CI configuration updates:

  • Updated the ESP32-P4 FQBNs in libraries/ESP_SR/examples/Basic/ci.yml to include ChipVariant=postv3 for all build variants.
  • Updated the ESP32-P4 FQBNs in tests/validation/nvs/ci.yml to include ChipVariant=postv3 for all build variants, ensuring consistency in validation tests.

Test Scenarios

CI

@lucasssvaz lucasssvaz self-assigned this Dec 8, 2025
@lucasssvaz lucasssvaz added Type: CI & Testing Related to continuous integration, automated testing, or test infrastructure. hil_test Run Hardware Tests Chip: ESP32-P4 Issue is related to support of ESP32-P4 Chip CI Failure Expected For PRs where CI failure is expected labels Dec 8, 2025
@github-actions
Copy link
Contributor

github-actions bot commented Dec 8, 2025

Messages
📖 🎉 Good Job! All checks are passing!

👋 Hello lucasssvaz, we appreciate your contribution to this project!


📘 Please review the project's Contributions Guide for key guidelines on code, documentation, testing, and more.

🖊️ Please also make sure you have read and signed the Contributor License Agreement for this project.

Click to see more instructions ...


This automated output is generated by the PR linter DangerJS, which checks if your Pull Request meets the project's requirements and helps you fix potential issues.

DangerJS is triggered with each push event to a Pull Request and modify the contents of this comment.

Please consider the following:
- Danger mainly focuses on the PR structure and formatting and can't understand the meaning behind your code or changes.
- Danger is not a substitute for human code reviews; it's still important to request a code review from your colleagues.
- To manually retry these Danger checks, please navigate to the Actions tab and re-run last Danger workflow.

Review and merge process you can expect ...


We do welcome contributions in the form of bug reports, feature requests and pull requests.

1. An internal issue has been created for the PR, we assign it to the relevant engineer.
2. They review the PR and either approve it or ask you for changes or clarifications.
3. Once the GitHub PR is approved we do the final review, collect approvals from core owners and make sure all the automated tests are passing.
- At this point we may do some adjustments to the proposed change, or extend it by adding tests or documentation.
4. If the change is approved and passes the tests it is merged into the default branch.

Generated by 🚫 dangerJS against f6c2eb8

@github-actions
Copy link
Contributor

github-actions bot commented Dec 8, 2025

Test Results

  167 files    167 suites   1h 6m 11s ⏱️
   60 tests    59 ✅ 0 💤 1 ❌
1 238 runs  1 231 ✅ 0 💤 7 ❌

For more details on these failures, see this check.

Results for commit f6c2eb8.

♻️ This comment has been updated with latest results.

@github-actions
Copy link
Contributor

github-actions bot commented Dec 8, 2025

Memory usage test (comparing PR against master branch)

The table below shows the summary of memory usage change (decrease - increase) in bytes and percentage for each target.

MemoryFLASH [bytes]FLASH [%]RAM [bytes]RAM [%]
TargetDECINCDECINCDECINCDECINC
ESP32C5000.000.00000.000.00
ESP32P40⚠️ +4460.00⚠️ +0.060⚠️ +640.00⚠️ +0.20
ESP32S3000.000.00000.000.00
ESP32S2000.000.00000.000.00
ESP32C3000.000.00000.000.00
ESP32C6000.000.00000.000.00
ESP32H2000.000.00000.000.00
ESP32000.000.00000.000.00
Click to expand the detailed deltas report [usage change in BYTES]
TargetESP32C5ESP32P4ESP32S3ESP32S2ESP32C3ESP32C6ESP32H2ESP32
ExampleFLASHRAMFLASHRAMFLASHRAMFLASHRAMFLASHRAMFLASHRAMFLASHRAMFLASHRAM
libraries/BLE/examples/Server00⚠️ +446⚠️ +6400--00000000
libraries/Insights/examples/MinimalDiagnostics00--00000000--00
libraries/NetworkClientSecure/examples/WiFiClientSecure00⚠️ +398000000000--00
libraries/ESP_SR/examples/Basic--⚠️ +322000----------
libraries/ESP32/examples/Camera/CameraWebServer----0000------00
ESP32/examples/Camera/CameraWebServer (2)----0000------00
ESP32/examples/Camera/CameraWebServer (3)----00----------

@lucasssvaz lucasssvaz marked this pull request as ready for review December 10, 2025 03:15
@lucasssvaz lucasssvaz requested a review from me-no-dev December 10, 2025 03:16
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

Chip: ESP32-P4 Issue is related to support of ESP32-P4 Chip CI Failure Expected For PRs where CI failure is expected hil_test Run Hardware Tests Type: CI & Testing Related to continuous integration, automated testing, or test infrastructure.

Projects

None yet

Development

Successfully merging this pull request may close these issues.

2 participants