WIP: Further examples

[hornc]

TODO

• Improve notation / macro expansion to make the examples functional for any prime encoded virtual register
  (currently %VREG% is to be replaced using sed)

• The decrease doesn't currently test or leave the data unmodified if it is already zero (currently other registers get messed up if an already zeroed register is decreased below zero)

Example usage:

The output below show R0 with the initial state (register value, and its prime decoding), R1 is the final state after applying the code example.

./counterfish.py <(./cfmacro.py <(sed 's/%VREG%/5/g' examples/decv.cfm)) -i91125

result:

R0: 91125
   [0, 6, 3]
R1: 18225
   [0, 6, 2]

Which shows v.reg 5 (i.e. the third prime number register) decrease from 3 to 2, leaving v.reg.3 unchanged at 6.

Running the increase example on the same state:

./counterfish.py <(./cfmacro.py <(sed 's/%VREG%/5/g' examples/incv.cfm)) -i91125

result:

R0: 91125
   [0, 6, 3]
R1: 455625
   [0, 6, 4]

Running increase on v.reg.3:

./counterfish.py <(./cfmacro.py <(sed 's/%VREG%/3/g' examples/incv.cfm)) -i91125

result:

R0: 91125
   [0, 6, 3]
R1: 273375
   [0, 7, 3]

Running increase on v.reg.37:

 ./counterfish.py <(./cfmacro.py <(sed 's/%VREG%/37/g' examples/incv.cfm)) -i91125

result:

R0: 91125
   [0, 6, 3]
R1: 3371625
   [0, 6, 3, 0, 0, 0, 0, 0, 0, 0, 0, 1]

[hornc]

./counterfish.py <(./cfmacro.py <(sed 's/%VREG%/5/g' examples/incv.cfm)) -i91125

./counterfish.py <(./cfmacro.py examples/incv.cfm -v VREG=5 ) -i91125




./counterfish.py <(./cfmacro.py <(sed 's/%VREG%/7/g;s/%C%/5/g' examples/setvc.cfm)) -i1

./counterfish.py <(./cfmacro.py -v VREG=7,C=5 examples/setvc.cfm) -i1

Add a warning to list all unassigned variables when compiling macros