Adjust stepping and CPU map to eschew rewiring. #1
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Very simple really, GRBL does its step timing calculations and scheduling on one set of bitmasks,
therefore in the original setup, all GPIO pins for each operation must be on the same port.
However, it is simple enough to create the bitmask as 32-bits wide, let GRBL do all its math,
and then split it in half and write it to two separate ports as necessary.
I may expand this approach to additional functions as I continue to suss out which pins are attached to what.