Update Stm8s for Cosmic compatibility.

Make some modification to make SPL compatible with C++.

Author: ridhaosWi6labs

system/Drivers/STM8S_StdPeriph_Driver/inc/stm8s.h

@@ -207,10 +207,13 @@
 #define     __O     volatile         /*!< defines 'write only' permissions    */
 #define     __IO    volatile         /*!< defines 'read / write' permissions  */
 
-/*!< Signed integer types  */
-typedef   signed char     int8_t;
-typedef   signed short    int16_t;
-typedef   signed long     int32_t;
+#if defined(__ICCSTM8__) || defined(__CSMC__)
+  #include <stdint.h>
+#else
+  /*!< Signed integer types  */
+  typedef   signed char     int8_t;
+  typedef   signed short    int16_t;
+  typedef   signed long     int32_t;
 
 /*!< Unsigned integer types  */
 typedef unsigned char     uint8_t;
@@ -228,7 +231,10 @@ typedef uint16_t u16;
 typedef uint8_t  u8;
 
 
-typedef enum {FALSE = 0, TRUE = !FALSE} bool;
+  #ifndef __cplusplus
+    typedef enum {FALSE = 0, TRUE = !FALSE} bool;
+  #endif
+#endif 
 
 typedef enum {RESET = 0, SET = !RESET} FlagStatus, ITStatus, BitStatus, BitAction;
 
@@ -2745,8 +2751,13 @@ CFG_TypeDef;
 /*============================== Interrupt vector Handling ========================*/
 
 #ifdef _COSMIC_
- #define INTERRUPT_HANDLER(a,b) @far @interrupt void a(void)
- #define INTERRUPT_HANDLER_TRAP(a) void @far @interrupt a(void)
+  #ifdef __cplusplus
+    #define INTERRUPT_HANDLER(a,b) void a(void)
+    #define INTERRUPT_HANDLER_TRAP(a) void a(void)
+  #else
+    #define INTERRUPT_HANDLER(a,b) @interrupt @svlreg void a(void)
+    #define INTERRUPT_HANDLER_TRAP(a) @interrupt void a(void)
+  #endif
 #endif /* _COSMIC_ */
 
 #ifdef _RAISONANCE_
@@ -2767,7 +2778,11 @@ CFG_TypeDef;
 
 /*============================== Interrupt Handler declaration ========================*/
 #ifdef _COSMIC_
- #define INTERRUPT @far @interrupt
+  #ifdef __cplusplus
+    #define INTERRUPT
+  #else
+    #define INTERRUPT @interrupt
+  #endif
 #elif defined(_IAR_)
  #define INTERRUPT __interrupt
 #endif /* _COSMIC_ */

system/Drivers/STM8S_StdPeriph_Driver/src/stm8s_itc.c

@@ -16,8 +16,8 @@
   *
   *        http://www.st.com/software_license_agreement_liberty_v2
   *
-  * Unless required by applicable law or agreed to in writing, software 
-  * distributed under the License is distributed on an "AS IS" BASIS, 
+  * Unless required by applicable law or agreed to in writing, software
+  * distributed under the License is distributed on an "AS IS" BASIS,
   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
   * See the License for the specific language governing permissions and
   * limitations under the License.
@@ -52,7 +52,7 @@ uint8_t ITC_GetCPUCC(void)
 #ifdef _COSMIC_
   _asm("push cc");
   _asm("pop a");
-  return; /* Ignore compiler warning, the returned value is in A register */
+  // return; /* Ignore compiler warning, the returned value is in A register */
 #elif defined _RAISONANCE_ /* _RAISONANCE_ */
   return _getCC_();
 #else /* _IAR_ */
@@ -108,13 +108,13 @@ ITC_PriorityLevel_TypeDef ITC_GetSoftwarePriority(ITC_Irq_TypeDef IrqNum)
 {
   uint8_t Value = 0;
   uint8_t Mask = 0;
-  
+
   /* Check function parameters */
   assert_param(IS_ITC_IRQ_OK((uint8_t)IrqNum));
-  
+
   /* Define the mask corresponding to the bits position in the SPR register */
   Mask = (uint8_t)(0x03U << (((uint8_t)IrqNum % 4U) * 2U));
-  
+
   switch (IrqNum)
   {
   case ITC_IRQ_TLI: /* TLI software priority can be read but has no meaning */
@@ -160,7 +160,7 @@ ITC_PriorityLevel_TypeDef ITC_GetSoftwarePriority(ITC_Irq_TypeDef IrqNum)
     defined(STM8S003) ||defined(STM8S001) || defined (STM8S903) || defined (STM8AF52Ax) || defined (STM8AF62Ax)
   case ITC_IRQ_UART1_TX:
   case ITC_IRQ_UART1_RX:
-#endif /*STM8S208 or STM8S207 or STM8S007 or STM8S103 or STM8S003 or STM8S001 or STM8S903 or STM8AF52Ax or STM8AF62Ax */ 
+#endif /*STM8S208 or STM8S207 or STM8S007 or STM8S103 or STM8S003 or STM8S001 or STM8S903 or STM8AF52Ax or STM8AF62Ax */
 #if defined(STM8AF622x)
   case ITC_IRQ_UART4_TX:
   case ITC_IRQ_UART4_RX:
@@ -198,9 +198,9 @@ ITC_PriorityLevel_TypeDef ITC_GetSoftwarePriority(ITC_Irq_TypeDef IrqNum)
   default:
     break;
   }
-  
+
   Value >>= (uint8_t)(((uint8_t)IrqNum % 4u) * 2u);
-  
+
   return((ITC_PriorityLevel_TypeDef)Value);
 }
 
@@ -221,21 +221,21 @@ void ITC_SetSoftwarePriority(ITC_Irq_TypeDef IrqNum, ITC_PriorityLevel_TypeDef P
 {
   uint8_t Mask = 0;
   uint8_t NewPriority = 0;
-  
+
   /* Check function parameters */
   assert_param(IS_ITC_IRQ_OK((uint8_t)IrqNum));
   assert_param(IS_ITC_PRIORITY_OK(PriorityValue));
-  
+
   /* Check if interrupts are disabled */
   assert_param(IS_ITC_INTERRUPTS_DISABLED);
-  
+
   /* Define the mask corresponding to the bits position in the SPR register */
   /* The mask is reversed in order to clear the 2 bits after more easily */
   Mask = (uint8_t)(~(uint8_t)(0x03U << (((uint8_t)IrqNum % 4U) * 2U)));
-  
+
   /* Define the new priority to write */
   NewPriority = (uint8_t)((uint8_t)(PriorityValue) << (((uint8_t)IrqNum % 4U) * 2U));
-  
+
   switch (IrqNum)
   {
   case ITC_IRQ_TLI: /* TLI software priority can be written but has no meaning */
@@ -245,15 +245,15 @@ void ITC_SetSoftwarePriority(ITC_Irq_TypeDef IrqNum, ITC_PriorityLevel_TypeDef P
     ITC->ISPR1 &= Mask;
     ITC->ISPR1 |= NewPriority;
     break;
-    
+
   case ITC_IRQ_PORTB:
   case ITC_IRQ_PORTC:
   case ITC_IRQ_PORTD:
   case ITC_IRQ_PORTE:
     ITC->ISPR2 &= Mask;
     ITC->ISPR2 |= NewPriority;
     break;
-    
+
 #if defined(STM8S208) || defined(STM8AF52Ax)
   case ITC_IRQ_CAN_RX:
   case ITC_IRQ_CAN_TX:
@@ -266,9 +266,9 @@ void ITC_SetSoftwarePriority(ITC_Irq_TypeDef IrqNum, ITC_PriorityLevel_TypeDef P
     ITC->ISPR3 &= Mask;
     ITC->ISPR3 |= NewPriority;
     break;
-    
+
   case ITC_IRQ_TIM1_CAPCOM:
-#if defined(STM8S903) || defined(STM8AF622x) 
+#if defined(STM8S903) || defined(STM8AF622x)
   case ITC_IRQ_TIM5_OVFTRI:
   case ITC_IRQ_TIM5_CAPCOM:
 #else
@@ -279,13 +279,13 @@ void ITC_SetSoftwarePriority(ITC_Irq_TypeDef IrqNum, ITC_PriorityLevel_TypeDef P
     ITC->ISPR4 &= Mask;
     ITC->ISPR4 |= NewPriority;
     break;
-    
+
   case ITC_IRQ_TIM3_CAPCOM:
 #if defined(STM8S208) ||defined(STM8S207) || defined (STM8S007) || defined(STM8S103) || \
     defined(STM8S001) ||defined(STM8S003) ||defined(STM8S903) || defined (STM8AF52Ax) || defined (STM8AF62Ax)
   case ITC_IRQ_UART1_TX:
   case ITC_IRQ_UART1_RX:
-#endif /*STM8S208 or STM8S207 or STM8S007 or STM8S103 or STM8S003 or STM8S001 or STM8S903 or STM8AF52Ax or STM8AF62Ax */ 
+#endif /*STM8S208 or STM8S207 or STM8S007 or STM8S103 or STM8S003 or STM8S001 or STM8S903 or STM8AF52Ax or STM8AF62Ax */
 #if defined(STM8AF622x)
   case ITC_IRQ_UART4_TX:
   case ITC_IRQ_UART4_RX:
@@ -294,24 +294,24 @@ void ITC_SetSoftwarePriority(ITC_Irq_TypeDef IrqNum, ITC_PriorityLevel_TypeDef P
     ITC->ISPR5 &= Mask;
     ITC->ISPR5 |= NewPriority;
     break;
-    
+
 #if defined(STM8S105) || defined(STM8S005) || defined(STM8AF626x)
   case ITC_IRQ_UART2_TX:
   case ITC_IRQ_UART2_RX:
 #endif /*STM8S105 or STM8AF626x */
-    
+
 #if defined(STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8AF52Ax) || \
     defined(STM8AF62Ax)
   case ITC_IRQ_UART3_TX:
   case ITC_IRQ_UART3_RX:
   case ITC_IRQ_ADC2:
 #endif /*STM8S208 or STM8S207 or STM8AF52Ax or STM8AF62Ax */
-    
+
 #if defined(STM8S105) || defined(STM8S005) || defined(STM8S103) || defined(STM8S003) || \
     defined(STM8S001) || defined(STM8S903) || defined(STM8AF626x) || defined (STM8AF622x)
   case ITC_IRQ_ADC1:
 #endif /*STM8S105, STM8S005, STM8S103 or STM8S003 or STM8S001 or STM8S903 or STM8AF626x or STM8AF622x */
-    
+
 #if defined (STM8S903) || defined (STM8AF622x)
   case ITC_IRQ_TIM6_OVFTRI:
 #else
@@ -320,12 +320,12 @@ void ITC_SetSoftwarePriority(ITC_Irq_TypeDef IrqNum, ITC_PriorityLevel_TypeDef P
     ITC->ISPR6 &= Mask;
     ITC->ISPR6 |= NewPriority;
     break;
-    
+
   case ITC_IRQ_EEPROM_EEC:
     ITC->ISPR7 &= Mask;
     ITC->ISPR7 |= NewPriority;
     break;
-    
+
   default:
     break;
   }
@@ -334,10 +334,10 @@ void ITC_SetSoftwarePriority(ITC_Irq_TypeDef IrqNum, ITC_PriorityLevel_TypeDef P
 /**
   * @}
   */
-  
+
 /**
   * @}
   */
-  
+
 
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/