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fpga_diff: fix FpgaDiffTop generation and renaming #241

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Merged
poemonsense merged 1 commit into from
Nov 7, 2025
Merged

fpga_diff: fix FpgaDiffTop generation and renaming #241

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6 changes: 2 additions & 4 deletions Makefile
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Original file line number Diff line number Diff line change
@@ -1,12 +1,10 @@
TOP = TopMain
SIM_TOP = SimTop
FPGA_DIFF_TOP = FpgaDiffTop
FPGATOP = Top
# REAL_TOP selection:
# - if BOARD is exactly "fpgadiff" -> use FPGA_DIFF_TOP
# - else if BOARD starts with "sim" -> use SIM_TOP
# - if BOARD is exactly "fpgadiff" or "sim" -> use SIM_TOP
# - otherwise use FPGATOP
REAL_TOP = $(if $(filter fpgadiff,$(BOARD)),$(FPGA_DIFF_TOP),$(if $(filter sim,$(BOARD)),$(SIM_TOP),$(FPGATOP)))
REAL_TOP = $(if $(filter fpgadiff sim,$(BOARD)),$(SIM_TOP),$(FPGATOP))

BUILD_DIR = $(abspath ./build)

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8 changes: 2 additions & 6 deletions src/test/scala/TopMain.scala
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Original file line number Diff line number Diff line change
Expand Up @@ -36,12 +36,8 @@ class Top extends Module {
dontTouch(vga.io)
}

class FpgaDiffTop extends Module with HasDiffTestInterfaces {
lazy val config = NutCoreConfig(FPGADifftest = true)
val soc = Module(new NutShell()(config))
val io = IO(soc.io.cloneType)
soc.io <> io

class FpgaDiffTop extends NutShell()(NutCoreConfig(FPGADifftest = true)) with HasDiffTestInterfaces {
override def desiredName: String = "NutShell"
override def cpuName: Option[String] = Some("NutShell")
override def connectTopIOs(difftest: DifftestTopIO): Unit = {
val io = IO(chiselTypeOf(this.io))
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