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sidecar-mainboard-controller: add ringbuf for Tofino2 VID #2323

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sidecar-mainboard-controller: add ringbuf for Tofino2 VID #2323

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1 change: 1 addition & 0 deletions Cargo.lock
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1 change: 1 addition & 0 deletions drv/sidecar-mainboard-controller/Cargo.toml
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Original file line number Diff line number Diff line change
Expand Up @@ -17,6 +17,7 @@ drv-fpga-api = { path = "../fpga-api" }
drv-fpga-user-api = { path = "../fpga-user-api" }
drv-ignition-api = { path = "../ignition-api" }
userlib = { path = "../../sys/userlib" }
ringbuf = { path = "../../lib/ringbuf" }

[features]
bitstream = ["dep:drv-auxflash-api", "drv-fpga-api/auxflash"]
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10 changes: 10 additions & 0 deletions drv/sidecar-mainboard-controller/src/tofino2.rs
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Expand Up @@ -10,6 +10,14 @@ use drv_fpga_user_api::power_rail::*;
use userlib::FromPrimitive;
use zerocopy::{FromBytes, Immutable, IntoBytes, KnownLayout};

#[derive(Copy, Clone, PartialEq)]
enum VidTrace {
None,
Read(u8),
}

ringbuf::ringbuf!(VidTrace, 8, VidTrace::None);

#[derive(
Copy,
Clone,
Expand Down Expand Up @@ -335,6 +343,8 @@ impl Sequencer {
pub fn vid(&self) -> Result<Option<Tofino2Vid>, FpgaError> {
let v: u8 = self.fpga.read(Addr::TOFINO_POWER_VID)?;

ringbuf::ringbuf_entry!(VidTrace::Read(v));

if (v & Reg::TOFINO_POWER_VID::VID_VALID) != 0 {
match Tofino2Vid::from_u8(v & Reg::TOFINO_POWER_VID::VID) {
None => Err(FpgaError::InvalidValue),
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